Commit Graph

13444 Commits

Author SHA1 Message Date
Martin Povišer 975517b022 memory_memx: Fix log header 2024-02-23 12:27:10 +01:00
Martin Povišer b5b737de38 Shrink a bit more 2024-02-22 22:20:35 +01:00
Martin Povišer f7737a12ca Cut down startup banner 2024-02-22 22:14:32 +01:00
Martin Povišer 173f4b5fbd Bump Claire's notices 2024-02-22 22:03:44 +01:00
Martin Povišer 53ca7b48f8 techmap: Fix help message wording 2024-02-22 22:00:56 +01:00
Martin Povišer ba07cba6ce synth: Introduce `-inject` for amending techmap 2024-02-22 17:38:48 +01:00
Martin Povišer d77b792156 synth: Put in missing bounds check for `-lut` 2024-02-22 17:24:26 +01:00
github-actions[bot] 84116c9a38 Bump version 2024-02-22 00:15:36 +00:00
Miodrag Milanovic 38f1b0b12d Revert "Add shlwapi lib for mingw builds"
This reverts commit 20dbc860e7.
2024-02-21 20:23:49 +01:00
Miodrag Milanović 6e06723ddb
Merge pull request #4223 from rovinski/master
dfflibmap: use patmatch() from kernel/yosys.cc
2024-02-21 20:23:26 +01:00
Martin Povišer 4c96546717 equiv_simple: Take FFs into account for driver map
This fixes an issue introduced in commit 26644ea due to which flip-flops
are inadvertently ignored when building up driver map. The mentioned
commit wasn't without functional change after all.
2024-02-21 12:05:52 +01:00
github-actions[bot] d5934357f3 Bump version 2024-02-21 00:15:24 +00:00
Austin Rovinski 03cadf6474 dfflibmap: use patmatch() from kernel/yosys.cc
Replace OS matching functions with yosys kernel function

Signed-off-by: Austin Rovinski <rovinski@nyu.edu>
2024-02-20 11:04:55 -05:00
Claire Xen c734b2bfe5
Merge pull request #3519 from ekliptik/master
smt2/smtbmc: Fix mathsat counterexample VCD dump crash
2024-02-20 13:40:30 +01:00
Miodrag Milanovic 20dbc860e7 Add shlwapi lib for mingw builds 2024-02-20 12:44:55 +01:00
Miodrag Milanović bc8a3a5b18
Merge pull request #4219 from rovinski/master
dfflibmap: Add a -dont_use flag to ignore cells
2024-02-20 12:43:44 +01:00
github-actions[bot] 01d6c12af4 Bump version 2024-02-20 00:15:14 +00:00
Miodrag Milanović a3c81f4d62
Merge pull request #4216 from YosysHQ/show_href
show: Add option to add cell/wire "src" attribute into graphviz attribute href
2024-02-19 20:50:53 +01:00
Austin Rovinski 5059bb1d4f dfflibmap: force PathMatchSpecA on WIN32
Depending on the WIN32 compilation mode, PathMatchSpec may expect a LPCSTR or
LPCWSTR argument. char* is only convertable to LPCSTR, so use that
implementation

Signed-off-by: Austin Rovinski <rovinski@nyu.edu>
2024-02-19 14:40:46 -05:00
Austin Rovinski 689feed012 dfflibmap: Add a -dont_use flag to ignore cells
This is an alternative to setting the dont_use property in lib. This brings
dfflibmap in parity with the abc pass for dont_use.

Signed-off-by: Austin Rovinski <rovinski@nyu.edu>
2024-02-19 13:00:18 -05:00
N. Engelhardt 63d256dc83
Merge pull request #4221 from povik/const-hash-fix
rtlil: Fix `Const` hashing omission
2024-02-19 16:40:46 +01:00
Martin Povišer 78b0697d33
Merge pull request #4210 from whitequark/fix-read_verilog-hdlname
read_verilog: correctly format `hdlname` attribute value
2024-02-19 16:23:06 +01:00
Martin Povišer db947e4c71
Merge pull request #4218 from kivikakk/proc_rom-actionless-switch
proc_rom: don't assert on big actionless switch.
2024-02-19 16:21:40 +01:00
N. Engelhardt 83a3058bb8
Merge pull request #4202 from passingglance/master
Update CHAPTER_CellLib.rst
2024-02-19 16:20:53 +01:00
N. Engelhardt edd154e3cd
Merge pull request #4215 from povik/xprop-race
Address race in `xprop` tests
2024-02-19 16:16:16 +01:00
Martin Povišer f5013d035e rtlil: Fix `Const` hashing omission 2024-02-19 15:45:54 +01:00
N. Engelhardt 4b99db0b73
Merge pull request #4177 from povik/connect-extra_args
connect: Do interpret selection arguments
2024-02-19 15:18:37 +01:00
N. Engelhardt aebb7a0c4d
Merge pull request #4188 from povik/dlatch-bwmux
proc_dlatch: Include `$bwmux` among considered mux cells
2024-02-19 15:15:03 +01:00
passingglance 67e7f383d5
Merge branch 'YosysHQ:master' into master 2024-02-17 11:48:35 -08:00
Amelia Cuss bf4a46ccb3 proc_rom: don't assert on big actionless switch.
See the test case.  PROC_ROM will consider this for evaluation, even
though -- without any actions -- lhs is empty (but still "uniform").
A zero-width memory is constructed, which later fails check with:

ERROR: Assert `width != 0' failed in kernel/mem.cc:518.

Ensure we don't proceed if there's nothing to encode.
2024-02-18 01:33:28 +11:00
github-actions[bot] f8d4d7128c Bump version 2024-02-17 00:15:42 +00:00
N. Engelhardt 61b3b9b58a
Merge pull request #4197 from QuantamHD/sequential_area
stat: Add sequential area output to stat -liberty
2024-02-16 19:15:44 +01:00
Ethan Mahintorabi b8a1009de9
Update passes/cmds/stat.cc
Make reporting line more clear about the non cumulative area of sequential cells

Co-authored-by: N. Engelhardt <nakengelhardt@gmail.com>
2024-02-16 07:44:09 -08:00
Jannis Harder 811b7b54d4
Merge pull request #4204 from YosysHQ/micko/gen_test
do not override existing shell variable
2024-02-16 14:28:56 +01:00
Martin Povišer fdda501b58 ci: Stop pinning iverilog revision 2024-02-16 11:43:28 +01:00
Martin Povišer e51c77484a tests: Comment on `A[0]` 2024-02-16 11:43:28 +01:00
Martin Povišer 5a05344d9c tests: Fix initialization race in xprop tests 2024-02-16 11:43:28 +01:00
Ethan Mahintorabi f0df0e3912
update type and variable names
Signed-off-by: Ethan Mahintorabi <ethanmoon@google.com>
2024-02-16 00:01:44 +00:00
Ethan Mahintorabi 2d8343d423
update type and variable names
Signed-off-by: Ethan Mahintorabi <ethanmoon@google.com>
2024-02-15 23:59:19 +00:00
github-actions[bot] 074b50e9c0 Bump version 2024-02-15 00:15:29 +00:00
Miodrag Milanović f04bb1065e
Merge pull request #4212 from jix/make-test-noverific
tests: Support running `make test` with YOSYS_NOVERIFIC=1
2024-02-14 16:48:41 +01:00
Martin Povišer 18a5989084
Merge pull request #4211 from jix/fix-check-clk2fflogic
clk2fflogic: Fix handling of $check cells
2024-02-14 13:05:39 +01:00
Jannis Harder 149c1a7fc6 tests: Support running `make test` with YOSYS_NOVERIFIC=1
A yosys build with verific support can act as a non-verific yosys with
`YOSYS_NOVERIFIC=1` in the enviornment, which is useful for quickly
testing code that works with either frontend without rebuilding yosys.

Before this change, this did not work with `make test` as it would only
consider the build time configuration to decide whether to run tests
that depend on verific support, immediately failing on those tests when
the enviornment contains `YOSYS_NOVERIFIC=1`.

This adds logic to the makefile that checks this enviornment variable
and also exports YOSYS_NOVERIFIC=1 to the enviornment when that is
present as a make variable to support `make test YOSYS_NOVERIFIC=1`
invocations.
2024-02-14 12:07:47 +01:00
Jannis Harder bbdfcfdf30 clk2fflogic: Fix handling of $check cells
Fixes a bug in the handling of the recently introduced $check cells.
Both $check and $print cells in clk2fflogic are handled by the same code
and the existing tests for that were only using $print cells. This
missed a bug where the additional A signal of $check cells that is not
present on $print cells was dropped due to a typo, rendering $check
cells non-functional.

Also updates the tests to explicitly cover both cell types such that
they would have detected the now fixed bug.
2024-02-14 11:42:27 +01:00
Miodrag Milanovic 834276a2f7 show: Add option to add cell/wire "src" attribute into graphviz attribute href 2024-02-14 09:50:53 +01:00
github-actions[bot] 91685355a0 Bump version 2024-02-14 00:15:26 +00:00
Martin Povišer b16f4900fd ast/simplify: Interpret hdlname w/o expecting backslash 2024-02-13 21:38:41 +01:00
Catherine d8ce26a5ba read_verilog: correctly format `hdlname` attribute value.
The leading slash is not a part of the attribute as it only concerns
public values.
2024-02-13 18:41:53 +00:00
Catherine 42920c9bc0 cxxrtl: rationalize `debug_items` accessors.
Before this commit, `at()` and `operator[]` did the same thing, making
one of them redundant. There was also a somewhat awkward `parts_at()`,
which is more generic than `at()`.

After this commit, `parts_at()` becomes `at()`, and `at()` becomes
`operator[]`. Any quick-and-dirty accesses should use `items["name"]`,
which expects a single-part item. Generic code should instead use
`items.at("name")`, which will return multiple parts. Both will check
for the existence of the name.

This is unlikely to break downstream code since it's likely been using
the shorter `operator[]`. (In any case this API is not stable.)
2024-02-13 15:13:53 +00:00
Catherine c3c44225de cxxrtl: document some `module` invariants. NFC 2024-02-13 15:13:53 +00:00