mirror of https://github.com/YosysHQ/yosys.git
memory_memx: Fix log header
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@ -50,7 +50,7 @@ struct MemoryMemxPass : public Pass {
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}
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void execute(std::vector<std::string> args, RTLIL::Design *design) override {
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log_header(design, "Executing MEMORY_MEMX pass (converting $mem cells to logic and flip-flops).\n");
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log_header(design, "Executing MEMORY_MEMX pass (emit soft logic for out-of-bounds handling).\n");
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extra_args(args, 1, design);
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for (auto module : design->selected_modules())
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