Clifford Wolf
|
f7cf60b45c
|
Removed psmisc from deps list (usually fuser is already installed and the package name for it varies)
|
2014-12-14 17:24:44 +01:00 |
Clifford Wolf
|
cf55371a22
|
Added psmisc to prerequisites
|
2014-12-12 12:49:46 +01:00 |
Clifford Wolf
|
6c768c686f
|
Added missing prerequisites to README
|
2014-12-12 11:34:25 +01:00 |
Clifford Wolf
|
ac8f4d298b
|
Improved nomem2reg documentation
|
2014-10-30 09:12:55 +01:00 |
Clifford Wolf
|
70b2efdb05
|
Added support for $readmemh/$readmemb
|
2014-10-26 20:33:10 +01:00 |
Clifford Wolf
|
0b8cfbc6fd
|
Added support for "keep" on modules
|
2014-09-29 12:51:54 +02:00 |
Clifford Wolf
|
7815f81c32
|
Added "synth" command
|
2014-09-14 16:09:06 +02:00 |
Clifford Wolf
|
ee29ae2206
|
Removed yosys-svgviewer
|
2014-09-02 03:52:46 +02:00 |
Clifford Wolf
|
9f00a0cd2d
|
Using "xdot" instead of "yosys-svgviewer" in show command
|
2014-09-02 03:28:46 +02:00 |
Clifford Wolf
|
ba83a7bdc6
|
Added DPI-C documentation to README file
|
2014-08-22 14:37:14 +02:00 |
Clifford Wolf
|
74af3a2b70
|
Archibald Rust and Clifford Wolf: ffi-based dpi_call()
|
2014-08-22 14:22:09 +02:00 |
Clifford Wolf
|
640d9fc551
|
Added "via_celltype" attribute on task/func
|
2014-08-18 14:29:30 +02:00 |
Clifford Wolf
|
f53984795d
|
Added support for non-standard """ macro bodies
|
2014-08-13 13:03:38 +02:00 |
Clifford Wolf
|
d259abbda2
|
Added AST_MULTIRANGE (arrays with more than 1 dimension)
|
2014-08-06 15:52:54 +02:00 |
Clifford Wolf
|
b5a3419ac2
|
Added support for non-standard "module mod_name(...);" syntax
|
2014-08-04 15:40:07 +02:00 |
Clifford Wolf
|
1202f7aa4b
|
Renamed "stdcells.v" to "techmap.v"
|
2014-07-31 02:32:00 +02:00 |
Clifford Wolf
|
89c85cac41
|
Added links to some liberty files to README
|
2014-06-28 12:11:42 +02:00 |
Clifford Wolf
|
b1b96d199f
|
Added more calls to "hierarchy" to README file
|
2014-06-15 11:51:51 +02:00 |
Clifford Wolf
|
482d9208aa
|
Added read_verilog -sv options, added support for bit, logic,
allways_ff, always_comb, and always_latch
|
2014-06-12 11:54:20 +02:00 |
Clifford Wolf
|
12a3c05229
|
Updated README
|
2014-04-18 10:19:46 +02:00 |
Clifford Wolf
|
94c1307c26
|
Added libs/minisat (copy of minisat git master)
|
2014-03-12 10:17:51 +01:00 |
Clifford Wolf
|
91704a7853
|
Merged a few fixes for non-posix systems from github.com/Siesh1oo/yosys
(see https://github.com/cliffordwolf/yosys/pull/28)
|
2014-03-11 14:24:24 +01:00 |
Clifford Wolf
|
078cecf9ea
|
Updated todo items in README file
|
2014-02-05 01:59:30 +01:00 |
Clifford Wolf
|
d06258f74f
|
Added constant size expression support of sized constants
|
2014-02-01 13:50:23 +01:00 |
Clifford Wolf
|
1e2440e7ed
|
Added note about SystemVerilog assert statement to README
|
2014-02-01 13:04:49 +01:00 |
Clifford Wolf
|
aceab5fc08
|
Tiny change in example script in README
|
2014-01-29 11:11:10 +01:00 |
Clifford Wolf
|
09bd82db21
|
Fixes and other changes in README
|
2013-12-08 15:42:27 +01:00 |
Clifford Wolf
|
38e7fa6530
|
Tighter integration of ABC build
|
2013-11-27 09:08:35 +01:00 |
Clifford Wolf
|
620b7c900a
|
Updated TODOs
|
2013-11-24 17:58:05 +01:00 |
Clifford Wolf
|
28093d9dd2
|
Added "top" attribute to mark top module in hierarchy
|
2013-11-24 05:03:43 +01:00 |
Clifford Wolf
|
295e352ba6
|
Renamed "placeholder" to "blackbox"
|
2013-11-22 15:01:12 +01:00 |
Clifford Wolf
|
e4429c480e
|
Enable {* .. *} feature per default (removes dependency to REJECT feature in flex)
|
2013-11-22 12:46:02 +01:00 |
Clifford Wolf
|
92035fb38e
|
Implemented indexed part selects
|
2013-11-20 13:05:27 +01:00 |
Clifford Wolf
|
ac2be2d892
|
Fixed name resolution of local tasks and functions in generate block
|
2013-11-20 11:05:58 +01:00 |
Clifford Wolf
|
19dba2561e
|
Implemented part/bit select on memory read
|
2013-11-20 10:51:32 +01:00 |
Clifford Wolf
|
d248419fe0
|
Updated TODOs in README file
|
2013-11-20 02:10:48 +01:00 |
Clifford Wolf
|
e340532ce5
|
Added init= attribute for fpga-style reset values
|
2013-11-20 01:49:37 +01:00 |
Clifford Wolf
|
90300cbacc
|
Removed done or obsolete TODO items
|
2013-11-07 12:55:09 +01:00 |
Clifford Wolf
|
1d34fd7608
|
Added support for "keep" attributes on wires
|
2013-11-05 15:52:29 +01:00 |
Clifford Wolf
|
f912e029de
|
Added roadmap to readme file
|
2013-11-02 13:19:04 +01:00 |
Clifford Wolf
|
d78a9dfb37
|
Added paragraph to README file to avoid mycells.lib confusion
|
2013-10-31 11:15:00 +01:00 |
Clifford Wolf
|
f024b19ed9
|
README file typo fix
|
2013-10-31 01:15:07 +01:00 |
Clifford Wolf
|
cc7986a3e5
|
Some additions to the README file
|
2013-10-31 01:09:24 +01:00 |
Clifford Wolf
|
96e7abad48
|
Added iopadmap pass
|
2013-10-16 16:16:06 +02:00 |
Clifford Wolf
|
a12d39bc86
|
Added recommended apt-get commands to README
|
2013-10-11 22:25:23 +02:00 |
Clifford Wolf
|
8b2f7792ba
|
Updated TODO section in README
|
2013-08-01 20:02:15 +02:00 |
Clifford Wolf
|
3bb1996151
|
Added web site link to README
|
2013-07-21 15:04:37 +02:00 |
Clifford Wolf
|
3cd97a205f
|
Added ast frontend refactoring to TODO
|
2013-07-11 19:31:57 +02:00 |
Clifford Wolf
|
a4fd3cde8c
|
Documentation updates
|
2013-07-04 14:17:25 +02:00 |
Clifford Wolf
|
6c8a424872
|
Added "make abc" and "make install-abc"
|
2013-06-08 23:48:19 +02:00 |