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1242 Commits

Author SHA1 Message Date
Miodrag Milanovic 883831bd24 Fix mingw build 2022-08-29 10:04:12 +02:00
Aki Van Ness 6717e02023
kernel: hashlib: cleaned up message about table size in cases where `sizeof(int) == 4`, (closes #3440) 2022-08-25 11:08:51 -04:00
N. Engelhardt e3eb114e75 use inttypes format specifiers 2022-08-25 13:36:51 +02:00
N. Engelhardt 7e92e80741 dump runtime information for passes to json 2022-08-25 13:36:51 +02:00
Jannis Harder a5e1d3b997 formalff: Set new replaced_by_gclk attribute on removed dff's clks 
This attribute can be used by formal backends to indicate which clocks
were mapped to the global clock. Update the btor and smt2 backend which
already handle clock inputs to understand this attribute.
 2022-08-16 13:37:30 +02:00
Jannis Harder c0063288d6 Add the $anyinit cell and the formalff pass 
These can be used to protect undefined flip-flop initialization values
from optimizations that are not sound for formal verification and can
help mapping all solver-provided values in witness traces for flows that
use different backends simultaneously.
 2022-08-16 13:37:30 +02:00
Miodrag Milanovic 6c65ca4e50 Encode filename unprintable chars 2022-08-08 16:13:33 +02:00
Marcelina Kościelnicka a681904237 Assorted microoptimization speedups in core data structures. 2022-07-27 17:05:30 +02:00
Miodrag Milanović 29a5947bf8
Make all compile under OpenBSD (#3423) 
Co-authored-by: Josuah Demangeon <me@josuah.net>
 2022-07-27 14:16:46 +02:00
Miodrag Milanović f086da8bdf
Merge pull request #3392 from rockybulwinkle/rockybulwinkle-patch-1 
Update tcl doc, yosys does not return data to tcl
 2022-07-11 16:26:23 +02:00
Marcelina Kościelnicka 58c51b9a0b
Remove empty lines 2022-07-11 16:19:34 +02:00
Miodrag Milanovic 0098b32c6c using more portable formatting 2022-07-06 10:53:35 +02:00
rockybulwinkle ec2f8796bd
Update tcl doc, yosys does not return data to tcl 
This pull request is to address YosysHQ/yosys#2980.

The documentation, as originally written, does not make it clear that yosys commands, when used within a tcl script, do not return any value to the tcl script.

This pull request notes this and offers a workaround via tee as noted in the issue.
 2022-06-23 13:34:08 -05:00
Marcelina Kościelnicka 6b7efe12b7 Add a check for packed memory MEMID uniqueness 2022-06-13 19:23:55 +02:00
Henner Zeller 9c41b43191 Use compiler-generated default constructor for RTLIL::Const::Const 
No need for a manual implementation.
While at it: have the constructor that takes a string take a
const string reference instead to avoid a copy.
 2022-06-09 16:07:45 +01:00
Jacob Lifshay cd57c5adb3 smt2: Add smtlib2_comb_expr attribute to allow user-selected smtlib2 expressions 2022-06-02 22:37:29 -07:00
Marcelina Kościelnicka 3a0aa9c663 memory_dff: Add support for no_rw_check attribute. 2022-06-02 12:49:34 +02:00
Miodrag Milanović 197c9e04e8
Merge pull request #3333 from mohamed/feature/tmpdir 
Observe $TMPDIR variable when creating tmp files
 2022-05-27 16:51:16 +02:00
Miodrag Milanovic 08275a1569 Cleanup, and fix windows 2022-05-27 16:13:55 +02:00
Mohamed A. Bamakhrama 1822be8792 Observe $TMPDIR variable when creating tmp files 
POSIX defines $TMPDIR as containing the pathname of the directory where
programs can create temporary files. On most systems, this variable points to
"/tmp". However, on some systems it can point to a different location.
Without respecting this variable, yosys fails to run on such systems.

Signed-off-by: Mohamed A. Bamakhrama <mohamed@alumni.tum.de>
 2022-05-27 15:06:53 +02:00
Miodrag Milanovic 4316cdb603 Remove set but unused variable 2022-05-27 12:37:03 +02:00
Marcelina Kościelnicka 7c5dba8b77 Add memory_libmap pass. 2022-05-18 17:32:56 +02:00
Miodrag Milanović 7c64c70727
Merge pull request #3310 from robinsonb5-PRs/master 
Now calls Tcl_Init after creating the interp, fixes clock format.
 2022-05-17 09:33:20 +02:00
Alastair M. Robinson 6c6017c973 Use log_warning when Tcl_Init fails, report error with Tcl_ErrnoMsg. 2022-05-16 20:22:28 +01:00
Marcelina Kościelnicka 2858bb03cd Add opt_ffinv pass. 2022-05-13 23:02:30 +02:00
Marcelina Kościelnicka 990c9b8e11 Add proc_rom pass. 2022-05-13 00:37:14 +02:00
Alastair M. Robinson 83dbea1689 Now calls Tcl_Init after creating the interp, fixes clock format. 2022-05-10 18:48:54 +01:00
Miodrag Milanovic d8adbff72f Handle possible non-memory indexed data 2022-05-06 08:05:23 +02:00
Miodrag Milanovic 8b3657454b map memory location to wire value, if memory is converted to FFs 2022-05-04 13:08:16 +02:00
Miodrag Milanovic ad48639cdd Start restoring memory state from VCD/FST 2022-05-04 10:41:04 +02:00
Miodrag Milanovic 9c7deabf94 Ignore change on last edge 2022-04-22 15:24:02 +02:00
Miodrag Milanovic 2e47b61cc6 Proper scope naming from FST 2022-03-30 15:55:15 +02:00
Marcelina Kościelnicka 3bebe17e5d kernel/mem: Only use FF init in read-first emu for mem with init 2022-03-28 17:03:02 +02:00
NotAFile 349c0ff0a7 Add some more reserve calls to RTLIL::Const 
This results in a slight ~0.22% total speedup synthesizing vexriscv
 2022-03-25 18:38:00 +00:00
Miodrag Milanovic 55eed8df57 More verbose warnings 2022-03-18 14:47:35 +01:00
Miodrag Milanovic 1f3423cd7d Recognize registers and set initial state for them in tb 2022-03-16 14:35:39 +01:00
Miodrag Milanovic 8be09b5b24 VCD reader support by using external tool 2022-02-28 09:09:07 +01:00
Miodrag Milanovic fca168797e Fix for last clock edge data 2022-02-25 16:15:32 +01:00
Miodrag Milanovic 5f918803de Changed error message 2022-02-18 15:06:49 +01:00
Miodrag Milanovic fb22d7cdc4 Add support for various ff/latch cells simulation 2022-02-16 13:27:59 +01:00
Claire Xen 49545c73f7
Merge branch 'master' into clk2ff-better-names 2022-02-11 16:03:12 +01:00
Miodrag Milanović d7f7227ce8
Merge pull request #3185 from YosysHQ/micko/co_sim 
Add co-simulation in sim pass
 2022-02-07 16:36:43 +01:00
Miodrag Milanovic c0a156bcb4 Error detection for co-simulation 2022-02-04 11:11:36 +01:00
Miodrag Milanovic 6db23de7b1 bug fix and cleanups 2022-02-04 10:01:06 +01:00
Miodrag Milanovic 26de52fa09 Cleanup 2022-01-31 12:00:15 +01:00
Miodrag Milanovic 543feb75cb Display simulation time data 2022-01-31 10:52:47 +01:00
Marcelina Kościelnicka 93508d58da Add $bmux and $demux cells. 2022-01-28 23:34:41 +01:00
Miodrag Milanovic cb12b7c4d8 ignore not found private signals 2022-01-28 14:20:16 +01:00
Miodrag Milanovic f0f3c81c56 preserve VCD mangled names 2022-01-28 14:10:39 +01:00
Miodrag Milanovic 72acce0c82 detect edges even when x 2022-01-28 13:53:27 +01:00