Eddie Hung
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02973474df
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Remove extra newline
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2019-06-03 20:04:47 -07:00 |
Eddie Hung
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c9a0bac541
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IS_C_INVERTED
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2019-06-03 19:45:56 -07:00 |
Eddie Hung
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0ad50332d9
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Execute techmap and arith_map simultaneously
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2019-06-03 19:36:09 -07:00 |
Eddie Hung
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ebcc85b9b8
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Fix `ifndef
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2019-06-03 12:37:02 -07:00 |
Eddie Hung
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0092770317
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Make SB_LUT4 a whitebox, SB_DFF a blackbox (for now)
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2019-06-03 12:34:55 -07:00 |
Eddie Hung
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d018cd9fe3
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Assert that box_unique_id is indeed unique
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2019-06-03 12:33:47 -07:00 |
Eddie Hung
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295bd8d0bf
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Remove dupe
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2019-06-03 12:32:20 -07:00 |
Eddie Hung
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a54822b1bc
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Skip internal modules when generating box_unique_id
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2019-06-03 12:31:23 -07:00 |
Eddie Hung
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257f7ff5f6
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When creating new holes cell, inherit parameters too
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2019-06-03 12:30:54 -07:00 |
Eddie Hung
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4da25c76b3
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Ooopsie
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2019-06-03 09:33:42 -07:00 |
Eddie Hung
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9f44a71715
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Consistent with xilinx
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2019-06-03 09:23:43 -07:00 |
Maciej Kurc
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5739cf5265
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Added tests for attributes
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
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2019-06-03 09:25:20 +02:00 |
Clifford Wolf
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36120fcc30
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Only support Symbiotic EDA flavored Verific
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-06-02 10:14:50 +02:00 |
Eddie Hung
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2228cef62f
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Add flops as blackboxes
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2019-05-31 18:11:46 -07:00 |
Eddie Hung
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01f71085f2
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Add FD*E_1 -> FD*E techmap rules
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2019-05-31 18:11:24 -07:00 |
Eddie Hung
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dea36d4366
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Techmap flops before ABC again
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2019-05-31 18:10:25 -07:00 |
Eddie Hung
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e3d160a9ca
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parse_xaiger to cope with flops
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2019-05-31 18:06:36 -07:00 |
Eddie Hung
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4623177655
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ABC9 to understand flops
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2019-05-31 15:23:33 -07:00 |
Eddie Hung
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eb08e71bd1
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Merge branch 'xaig' into xc7mux
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2019-05-31 13:03:03 -07:00 |
Eddie Hung
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a379234f56
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Throw out unused code inherited from abc
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2019-05-31 12:50:11 -07:00 |
Maciej Kurc
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a6cadf6318
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Added support for parsing attributes on port connections.
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
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2019-05-31 14:58:43 +02:00 |
Clifford Wolf
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90ec2cda42
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Fix "tee" handling of log_streams
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-05-31 09:28:51 +02:00 |
Eddie Hung
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887c31f33b
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Fix issue where keep signal became PI, but also box was adding CI driver
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2019-05-30 16:03:22 -07:00 |
Eddie Hung
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a41553a861
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read_xaiger() to name box signals
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2019-05-30 16:02:40 -07:00 |
Eddie Hung
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4a6b9af227
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Fix spelling
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2019-05-30 15:50:47 -07:00 |
Eddie Hung
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1ad33c3b5a
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Remove whitebox attribute from DRAMs for now
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2019-05-30 13:07:29 -07:00 |
Eddie Hung
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e3c8132d7a
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Do not re-sort box_module ports
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2019-05-30 12:26:51 -07:00 |
Eddie Hung
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c6fa4faa37
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Remove whitespace
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2019-05-30 12:25:21 -07:00 |
Eddie Hung
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a44fe3a632
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Revert "Re-enable &dc2"
This reverts commit 8c58c728a7 .
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2019-05-30 11:41:50 -07:00 |
Eddie Hung
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0800846e73
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Do not double count LUT1s
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2019-05-30 11:32:14 -07:00 |
Eddie Hung
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fdfc18be91
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Carry in/out to be the last input/output for chains to be preserved
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2019-05-30 01:23:36 -07:00 |
Clifford Wolf
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2faa1d0e80
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Enable Verific flag veri_elaborate_top_level_modules_having_interface_ports, fixes #1055
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-05-30 10:04:26 +02:00 |
Clifford Wolf
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0df8a3b461
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Merge pull request #1057 from mmicko/fix_478
Aded one more load of .conf to support change of prefix
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2019-05-30 09:58:51 +02:00 |
Eddie Hung
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8c58c728a7
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Re-enable &dc2
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2019-05-30 00:42:41 -07:00 |
Eddie Hung
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2560f92f29
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Reduce -W to 160
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2019-05-29 23:01:46 -07:00 |
Eddie Hung
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276f5f8b81
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Some more realistic delays...
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2019-05-29 22:55:34 -07:00 |
Eddie Hung
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854557814e
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Erase all boxes before stitching
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2019-05-29 19:17:36 -07:00 |
Eddie Hung
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b955344ecd
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Call &if with -W 250
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2019-05-29 16:34:52 -07:00 |
Eddie Hung
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5e75abf870
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Bump ABC
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2019-05-29 16:34:43 -07:00 |
Eddie Hung
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25befbf542
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Rename to #23
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2019-05-29 15:26:33 -07:00 |
Eddie Hung
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aa2380c17a
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Add abc_test024
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2019-05-29 15:24:38 -07:00 |
Eddie Hung
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1423384367
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Fix abc_test024
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2019-05-29 15:24:09 -07:00 |
Eddie Hung
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ecaa7856e9
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Add some debug to abc9
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2019-05-29 15:21:41 -07:00 |
Miodrag Milanovic
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14bd40cd3d
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Aded one more load of .conf to support change of prefix
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2019-05-29 18:57:03 +02:00 |
Eddie Hung
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92197326b8
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Add abc9_test022
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2019-05-28 12:43:07 -07:00 |
Eddie Hung
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b4321a31bb
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Fix for abc9_test022
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2019-05-28 12:42:17 -07:00 |
Eddie Hung
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13e233217c
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Small improvement
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2019-05-28 11:29:59 -07:00 |
Clifford Wolf
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349c47250a
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Merge pull request #1049 from YosysHQ/clifford/fix1047
Do not use shiftmul peepopt pattern when mul result is truncated
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2019-05-28 19:02:26 +02:00 |
Eddie Hung
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5f39c262c2
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From master
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2019-05-28 09:38:58 -07:00 |
Eddie Hung
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cdedf51c32
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From master
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2019-05-28 09:37:50 -07:00 |