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Remove whitebox attribute from DRAMs for now

This commit is contained in:
Eddie Hung 2019-05-30 13:07:29 -07:00
parent e3c8132d7a
commit 1ad33c3b5a
1 changed files with 2 additions and 2 deletions
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4
techlibs/xilinx/cells_sim.v
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@ -281,7 +281,7 @@ module FDPE_1 ((* abc_flop_q *) output reg Q, input C, CE, D, PRE);
always @(negedge C, posedge PRE) if (PRE) Q <= 1'b1; else if (CE) Q <= D;
endmodule
(* abc_box_id = 4, lib_whitebox *)
(* abc_box_id = 4 /*, lib_whitebox*/ *)
module RAM64X1D (
output DPO, SPO,
input D, WCLK, WE,
@ -301,7 +301,7 @@ module RAM64X1D (
`endif
endmodule
(* abc_box_id = 5, lib_whitebox *)
(* abc_box_id = 5 /*, lib_whitebox*/ *)
module RAM128X1D (
output DPO, SPO,
input D, WCLK, WE,