Clifford Wolf
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4a697accd4
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Fixed oom bug in ilang parser
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2015-11-29 20:30:32 +01:00 |
Clifford Wolf
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32f5ee117c
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Fixed performance bug in ilang parser
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2015-11-27 19:46:47 +01:00 |
Clifford Wolf
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a7ffb85690
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Merge branch 'master' of github.com:cliffordwolf/yosys
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2015-11-26 18:24:23 +01:00 |
Clifford Wolf
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6459e3ac39
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Removed dangling ';' in rtlil.h
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2015-11-26 18:11:34 +01:00 |
Clifford Wolf
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0793f1b196
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Added ice40_ffinit pass
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2015-11-26 18:11:06 +01:00 |
Clifford Wolf
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ab2d8e5c8c
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Added PRIM_DLATCHRS support to verific front-end
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2015-11-24 12:16:19 +01:00 |
Clifford Wolf
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8ff229a3ea
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Fixed WE/RE usage in iCE40 BRAM mapping
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2015-11-24 10:51:34 +01:00 |
Clifford Wolf
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c86fbae3d1
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Fixed handling of re-declarations of wires in tasks and functions
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2015-11-23 17:09:57 +01:00 |
Clifford Wolf
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e61c7f887a
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Added torder command
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2015-11-19 15:34:32 +01:00 |
Clifford Wolf
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415e0a1b90
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Fixed performance bug in Verific importer
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2015-11-16 12:38:56 +01:00 |
Clifford Wolf
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b18f3a2974
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Changes for Verific 3.16_484_32_151112
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2015-11-12 19:28:14 +01:00 |
Clifford Wolf
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fd3e10c295
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Link to vlsitechnology.org for liberty files
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2015-11-12 13:15:19 +01:00 |
Clifford Wolf
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7ae3d1b5a9
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More bugfixes in handling of parameters in tasks and functions
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2015-11-12 13:02:36 +01:00 |
Clifford Wolf
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34f2b84fb6
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Fixed handling of parameters and localparams in functions
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2015-11-11 10:54:35 +01:00 |
Clifford Wolf
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d98d99aec6
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Added "abc -g"
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2015-11-10 11:10:11 +01:00 |
Clifford Wolf
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faa3da5a1b
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Merge pull request #97 from zeldin/master
Fix a segfault in dffinit when the value has too few bits
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2015-11-08 22:16:49 +01:00 |
Marcus Comstedt
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8c2bdef36d
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Fix a segfault in dffinit when the value has too few bits
The code was already trying to add the required number of bits, but
fell one short of the mark.
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2015-11-08 19:16:56 +01:00 |
Clifford Wolf
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1ec6429bad
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Added "singleton" pass
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2015-11-07 19:10:43 +01:00 |
Clifford Wolf
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3ad742056b
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Fixed iCE40 SB_IO OUTPUT_ENABLE vs. outena_q handling
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2015-11-06 17:02:16 +01:00 |
Clifford Wolf
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f401eeb0cf
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Bugfix in mapping $tribuf to $_TBUF_
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2015-11-05 12:37:43 +01:00 |
Clifford Wolf
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ddf3e2dc65
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Bugfix in memory_dff
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2015-10-31 22:01:41 +01:00 |
Clifford Wolf
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ccdbf41be6
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Improvements in wreduce
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2015-10-31 13:39:30 +01:00 |
Clifford Wolf
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864808992b
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Bugfix in Xilinx LUT mapping
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2015-10-30 13:58:03 +01:00 |
Clifford Wolf
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1e32e4bdae
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Improved SigMap performance
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2015-10-28 11:21:55 +01:00 |
Clifford Wolf
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e69efec588
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Improvements in new SigMap
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2015-10-28 00:39:53 +01:00 |
Clifford Wolf
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0c202a2549
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Use mfp<> in equiv_mark
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2015-10-27 19:15:35 +01:00 |
Clifford Wolf
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f3db70d2f3
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Removed old SigMap implementation
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2015-10-27 15:09:44 +01:00 |
Clifford Wolf
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09b4050f2e
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Added hashlib::mfp and new SigMap
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2015-10-27 15:04:47 +01:00 |
Clifford Wolf
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27714acd8a
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Improvements in equiv_struct
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2015-10-25 22:04:20 +01:00 |
Clifford Wolf
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d014ba2d0e
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Major refactoring of equiv_struct
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2015-10-25 19:31:29 +01:00 |
Clifford Wolf
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207736b4ee
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Import more std:: stuff into Yosys namespace
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2015-10-25 19:30:49 +01:00 |
Clifford Wolf
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da923c198e
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Added "equiv_add -cell"
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2015-10-25 14:35:40 +01:00 |
Clifford Wolf
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83bd27bf6e
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equiv_struct now creates equiv_merged attributes
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2015-10-25 02:15:20 +02:00 |
Clifford Wolf
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453736d918
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Improvements in equiv_struct
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2015-10-24 23:04:17 +02:00 |
Clifford Wolf
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7f110e7018
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renamed SigSpec::to_single_sigbit() to SigSpec::as_bit(), added is_bit()
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2015-10-24 22:56:40 +02:00 |
Clifford Wolf
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6af8076967
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improvement in "stat"
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2015-10-24 21:56:53 +02:00 |
Clifford Wolf
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a1c3df7fe4
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Fixed driver conflict handling (various cmds)
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2015-10-24 19:23:30 +02:00 |
Clifford Wolf
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6fe48cf41e
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equiv_purge bugfix, using SigChunk in Yosys namespace
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2015-10-24 19:09:45 +02:00 |
Clifford Wolf
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2a0f577f83
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Fixed handling of driver-driver conflicts in wreduce
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2015-10-24 13:44:35 +02:00 |
Clifford Wolf
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4cec1c058d
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Added equiv_mark command
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2015-10-23 23:56:58 +02:00 |
Clifford Wolf
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c35db8c19e
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Disabled "Skipping blackbox module" msg in show command
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2015-10-23 20:11:05 +02:00 |
Clifford Wolf
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281a033e92
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Added support for ":" as comment symbol after ;-parsing
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2015-10-23 20:08:33 +02:00 |
Clifford Wolf
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15a67392f1
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Also merge $equiv cells in equiv_struct
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2015-10-23 15:26:58 +02:00 |
Clifford Wolf
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d19069b0fb
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Improvements in equiv_struct
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2015-10-23 15:11:57 +02:00 |
Clifford Wolf
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84a07ffb8a
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Added equiv_purge
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2015-10-22 15:40:27 +02:00 |
Clifford Wolf
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00e05b1310
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Added equiv_struct command
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2015-10-21 17:12:35 +02:00 |
Clifford Wolf
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6416dfee93
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Improved inout handling in equiv_make
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2015-10-21 15:42:50 +02:00 |
Clifford Wolf
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bbcbf739e6
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Progress on cell help messages
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2015-10-20 16:49:11 +02:00 |
Clifford Wolf
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5d1c0ce7c0
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Progress on cell help messages
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2015-10-17 02:35:19 +02:00 |
Clifford Wolf
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255bb914ba
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Progress in yosys-smtbmc
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2015-10-15 15:54:59 +02:00 |