riscv
/
yosys
mirror of https://github.com/YosysHQ/yosys.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

Link to vlsitechnology.org for liberty files

This commit is contained in:
Clifford Wolf 2015-11-12 13:15:19 +01:00
parent 7ae3d1b5a9
commit fd3e10c295
1 changed files with 4 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
README
View File

@ -192,13 +192,11 @@ for the given cell library:
If you do not have a liberty file but want to test this synthesis script,
you can use the file examples/cmos/cmos_cells.lib from the yosys sources.
Various more complex liberty files (for testing) can be found here:
Liberty file downloads for and information about free and open ASIC standard
cell libraries can be found here:
http://vlsiarch.ecen.okstate.edu/flows/MOSIS_SCMOS/latest/..
../cadence/lib/tsmc025/signalstorm/osu025_stdcells.lib
../cadence/lib/ami035/signalstorm/osu035_stdcells.lib
../cadence/lib/tsmc018/signalstorm/osu018_stdcells.lib
../cadence/lib/ami05/signalstorm/osu05_stdcells.lib
http://www.vlsitechnology.org/html/libraries.html
http://www.vlsitechnology.org/synopsys/vsclib013.lib
The command "synth" provides a good default synthesis script (see "help synth").
If possible a synthesis script should borrow from "synth". For example: