caravel/lef
manarabdelaty 83e150bf25 [DATA] Add spare_logic_block 2021-11-24 20:36:23 +02:00
..
caravel_clocking.lef [DATA] update caravel_clocking module (removed long li1 routes, in total it used 8um from li1) 2021-11-20 13:07:23 +02:00
chip_io.lef [DATA] Add initial caravel layout 2021-11-19 01:37:10 +02:00
chip_io_alt.lef [DATA] Add user_analog_project_wrapper and chip_io_alt gds/lef views 2021-11-22 23:08:25 +02:00
digital_pll.lef [DATA] Update digital_pll pin placement to have it align with the HK 2021-11-19 01:28:40 +02:00
gpio_control_block.lef [DATA] Update gpio_control_block (li1 used 2um) 2021-11-20 14:43:20 +02:00
gpio_defaults_block.lef Update gpio_defaults_block to align the pins with the gpio_control_block 2021-11-05 23:27:32 +02:00
gpio_logic_high.lef harden gpio_control_block 2021-11-04 16:19:12 +02:00
housekeeping.lef [DATA] Update HK module (li1 routing: 249um) 2021-11-20 15:13:16 +02:00
mgmt_protect.lef [DATA] Update mgmt_protect (removed all li1 routing ) 2021-11-19 13:11:18 +02:00
mgmt_protect_hv.lef [DATA] Add views for the mgmt_protect 2021-11-15 13:21:52 +02:00
mprj2_logic_high.lef [DATA] Add views for the mgmt_protect 2021-11-15 13:21:52 +02:00
mprj_logic_high.lef [DATA] Add views for the mgmt_protect 2021-11-15 13:21:52 +02:00
simple_por.lef Add USE POWER/USE GROUND properties to the simple_port lef view 2021-11-17 17:57:23 +02:00
spare_logic_block.lef [DATA] Add spare_logic_block 2021-11-24 20:36:23 +02:00
user_analog_project_wrapper.lef [DATA] Add user_analog_project_wrapper and chip_io_alt gds/lef views 2021-11-22 23:08:25 +02:00
user_id_programming.lef [DATA] Add gds/lef/maglef/gl views for the user_id_programming block 2021-11-15 18:17:32 +02:00
user_project_wrapper.lef [DATA] Add digital user project wrapper 2021-11-17 13:13:11 +02:00
xres_buf.lef [DATA] Add views for xres_buf 2021-11-15 18:07:02 +02:00