* - update caravan configuration
* change correct gpio_default blocks instance names
* implement powerrouting work around
* place spare logic blocks
* keep the history of runs and sym link last/final one
* - update caravan mag, def and gl views
- add fake power routing cell in the rtl as a placeholder for openlane
to prevent routing on that cell
- fix some syntax errors in chip_io_alt
- match simple_por lef pins with mag by regenerating it
* Apply automatic changes to Manifest and README.rst
* add caravan power routing lef
* - update mag and def view of caravan
- add_macro_placement for fake cell
* Added back the power routing to Caravan, fixed DRC errors, ran LVS,
corrected placement of isolated substrate regions, and replaced the
signal routing for the analog lines. Be aware that merging with
main may cause issues with the mgmt_protect.mag file and its
subcells mprj2_logic_high.mag and mprj_logic_high.mag. It may be
worth cherry-picking the files to merge and exclude those layouts.
Co-authored-by: kareem <kareem.farid@efabless.com>
Co-authored-by: kareefardi <kareefardi@users.noreply.github.com>
Co-authored-by: Jeff DiCorpo <42048757+jeffdi@users.noreply.github.com>
Still evaluating why the layout does not pass LVS like it did
previously, although all current LVS errors appear to be related
to magic's extraction of the isolated substrates, and do not
imply functional issues. Also, LVS has only been done on the
top level.
* Fix syntax error in gpio_control_block
Fixed syntax error that was only visible when running iverilog for simulation
* Apply automatic changes to Manifest and README.rst
Co-authored-by: marwaneltoukhy <marwaneltoukhy@users.noreply.github.com>
* REVERT ME: temporarily match simple_por pin in verilog with lef
* - update configs
- add patch file for power routing def
* - update the following caravel toplevel views
- gl
- mag
- def
- add caravel power routing def
* Apply automatic changes to Manifest and README.rst
* update gl mag and def for caravel
* Revert "REVERT ME: temporarily match simple_por pin in verilog with lef"
This reverts commit b70c27c69f.
* update caravel gds
* Apply automatic changes to Manifest and README.rst
* Added text and logo cells back into the caravel top level. Put an
isolated ground marker layer on the xres_buf layout. Corrected
the power supply pin names on the gate level verilog netlist of
simple_por in caravel.v. Updated the copyright block text.
Corrected DRC errors in the top level routing.
Co-authored-by: Tim Edwards <tim@opencircuitdesign.com>
* - add openlane patch file to for input buffering workaround
- update configuration of mgmt protect
* mgmt_protect updated
* mgmt_protect updated
* remove some via3 to fix power shorts
Co-authored-by: Marwan Abbas <marwan@ciic.c.catx-ext-efabless.internal>
* remove openlane dependency from pdk-with-volare
* minor fix to remove openlane dependecy
Co-authored-by: Marwan Abbas <marwan@ciic.c.catx-ext-efabless.internal>
* Corrected the issue reported on the github issue tracker (#34)
in which the use of "clocking" as an instance name in caravel and
caravan conflicts with the system verilog keyword of the same
name.
* Apply automatic changes to Manifest and README.rst
Co-authored-by: RTimothyEdwards <RTimothyEdwards@users.noreply.github.com>
getting changed by "make ship" because the build is done in a place
where the path pointer to the user_id_programming GDS still points
back to the original caravel repository, not the user project
repository. The user_id_programming GDS was removed (no longer used),
the user_id_programming.mag file was modified to remove the path
pointer to the GDS, and the set_user_id.py script was modified to
make changes directly to the user_id_programming.mag file instead of
the GDS. An additional method was added to the set_user_id.py script
to modify the gate-level verilog/gl/user_id_programming.v to make
the user ID correct for gate-level testbench simulations.
~ PDK builds now use the openlane-tools magic container instead of being native
- ability to install PDK without SRAM removed: pdk-with-sram now aliases pdk which always installs sram