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218 Commits 16 Branches 1 Tag 1.8 GiB
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218 Commits

Author SHA1 Message Date
tangxifan c3fbe146f8 [Doc] Add default settings for readthedoc 2020-11-12 19:21:53 -07:00
tangxifan bb531bc8ba [Git] Add ignore files to doc compiled results 2020-11-12 19:13:20 -07:00
tangxifan 4897437c0d [Doc] Add online documentation 2020-11-12 19:07:10 -07:00
tangxifan 5f02463098 [HDL] Update wrapper for caravel SoC interface 2020-11-12 19:06:49 -07:00
tangxifan 7dafb7e3b2 [Arch] Use global clock from tile port in caravel architecture 2020-11-11 19:43:24 -07:00
tangxifan 35a64a195c [Testbench] Add post PnR testbench for 12x12 fabric 2020-11-11 17:16:21 -07:00
tangxifan 3792400da8 [Arch] Add fabric key for 12x12 fabric 2020-11-11 15:57:10 -07:00
tangxifan d3ae847f43 [Script] Add openfpga task for 12x12 fabric fit caravel SoC 2020-11-11 15:20:01 -07:00
tangxifan c0d3e7c91f
Merge pull request #18 from LNIS-Projects/ganesh_dev 
Updated 12x12 design, skipped updating module GDSs
 2020-11-11 14:15:42 -07:00
Ganesh Gore 82767cd1b2 Updated 12x12 design skipped module GDSs 2020-11-10 15:37:00 -07:00
Laboratory for Nano Integrated Systems (LNIS) 2407cb1fba
Merge pull request #17 from LNIS-Projects/xt_dev 
[Testbench] Fix bugs for the testbenches for the post-PnR netlists
 2020-11-09 19:46:56 -07:00
tangxifan e5e38dff80 [Testbench] Fix bugs for the testbenches for the post-PnR netlists 2020-11-09 19:38:37 -07:00
tangxifan e6768ba171
Merge pull request #16 from LNIS-Projects/ganesh_dev 
Change configuration flipflop + Fixed configuration chain
 2020-11-09 19:33:21 -07:00
Ganesh Gore 7dd7e33cb6 Change configuration flipflop + Fixed configuration chain 2020-11-09 19:17:15 -07:00
tangxifan ab85bafa11
Merge pull request #15 from LNIS-Projects/xt_dev 
Bug fixes for post-pnr netlists and arch
 2020-11-09 15:55:08 -07:00
tangxifan 16af5e6ad8 [Arch] Minor change to keep a regular arch in fle->lut connection 2020-11-09 15:52:46 -07:00
tangxifan 1b2cf27c2a [Testbench] Update post-PnR testbench with latest PnRed netlists 2020-11-09 15:12:32 -07:00
tangxifan 630c4060a8 [Arch] Detect some bugs (will not cause verification failed) in vpr arch 2020-11-09 15:12:00 -07:00
tangxifan 69afafb581
Merge pull request #14 from LNIS-Projects/ganesh_dev 
Ganesh dev
 2020-11-09 09:04:27 -07:00
Laboratory for Nano Integrated Systems (LNIS) dbe8c73bdb
Merge pull request #13 from LNIS-Projects/xt_dev 
Misc Updates: Caravel User Project Wrapper, Post-PnR Testbench and STA script
 2020-11-09 08:48:49 -07:00
Ganesh Gore 015c67e10f Added clock feedthroughs 2020-11-08 18:37:55 -07:00
tangxifan b2867de8b4 [SNPS_PT] fine-tune script for SDF output directory 2020-11-08 16:35:35 -07:00
tangxifan 0195c1601a [Doc] Add readme to SDF dir 2020-11-08 16:35:10 -07:00
tangxifan 802d72a606 [SNPS_PT] Add template script to generate SDF from post-PnR netlists 2020-11-08 16:31:33 -07:00
tangxifan 536494c0d4 [Doc] Add Synopsys PrimeTime readme 2020-11-08 16:31:08 -07:00
tangxifan 17e30c55bf [Testbench] Bug fix in the post-pnr testbench 2020-11-08 14:25:49 -07:00
tangxifan 11ee81f8c4 [Arch] Bug fix in the caravel arch 2020-11-08 14:25:38 -07:00
tangxifan 72db7fc7c0 [Script] Adapt openfpga task-run configuration to use the fabric key scripts 2020-11-08 11:47:08 -07:00
tangxifan 6e254356d1 [Script] Add openfpga script template using fabric key 2020-11-08 11:46:46 -07:00
tangxifan 309c63513a [Script] Add example openfpga-run scripts using fabric key 2020-11-08 11:41:07 -07:00
tangxifan 2683bdd0ae [HDL] Add Post-PnR testbench 2020-11-08 11:36:18 -07:00
tangxifan 795b958239 [Arch] Add fabric key for 2x2 fabric 2020-11-08 11:35:59 -07:00
tangxifan 25ada3f6a0 Merge branch 'master' into xt_dev 2020-11-08 10:22:18 -07:00
Ganesh Gore 229b8e22b4 Fixed scan-chain connections 2020-11-08 01:06:13 -07:00
tangxifan ae97e4424d [HDL] Add wrapper for Caravel interface 2020-11-07 22:42:29 -07:00
tangxifan 26951dad45
Merge pull request #12 from LNIS-Projects/ganesh_dev 
Ganesh dev
 2020-11-07 20:40:09 -07:00
Ganesh Gore 31a73a42ba Updated design with new architecure and merged grid_io 2020-11-06 22:35:31 -07:00
tangxifan a36cc83280
Merge pull request #11 from LNIS-Projects/xt_dev 
[Arch] Use single-output DFF to further compress area
 2020-11-06 15:15:52 -07:00
tangxifan 8d84d83eab [Arch] Use single-output DFF to further compress area 2020-11-06 11:47:31 -07:00
Laboratory for Nano Integrated Systems (LNIS) d9cbaa3eec
Merge pull request #10 from LNIS-Projects/xt_dev 
Patch to have UNIQUE routing blocks
 2020-11-05 22:23:50 -07:00
tangxifan 6811604e5c [Arch] Revert back to a lower Fc for area efficiency 2020-11-05 22:23:11 -07:00
tangxifan fe3bf8ba58 [Arch] Patch to have UNIQUE routing blocks 2020-11-05 22:20:51 -07:00
Laboratory for Nano Integrated Systems (LNIS) 2ed8bee461
Merge pull request #9 from LNIS-Projects/xt_dev 
Minor patch on arch for Caravel to force unique CBY
 2020-11-05 21:58:08 -07:00
tangxifan 1892dd5205 [Arch] Minor patch on arch to force unique CBY 2020-11-05 21:55:43 -07:00
Laboratory for Nano Integrated Systems (LNIS) e6c51dbb42
Merge pull request #8 from LNIS-Projects/xt_dev 
Addition of Architectures Tuned for Caravel SoC Interface
 2020-11-05 15:19:39 -07:00
tangxifan e952eb951d [HDL] Add preprocessing flags for running functional verification 2020-11-05 11:29:23 -07:00
tangxifan 6b474ce422 [Arch] Patch openfpga arch for new syntax on I/O 2020-11-05 10:37:37 -07:00
tangxifan bbdd13ac16 [Script] Add openfpga task run for caravel architecture 2020-11-05 10:25:23 -07:00
tangxifan a25b8252f3 [Arch] Add openfpga arch template for the caravel 2020-11-05 10:20:54 -07:00
tangxifan 64d1113461 [HDL] Add HDL codes for the FPGA I/O cell tuned for Caravel 2020-11-05 10:18:52 -07:00