OpenFPGA/openfpga/src/fpga_verilog
tangxifan 60f40a9657 use constant module manager as much as possible in Verilog writer 2020-02-16 16:35:26 -07:00
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verilog_api.cpp bring FPGA top module verilog writer online. Fabric Verilog generator done 2020-02-16 16:18:14 -07:00
verilog_api.h add grid module Verilog writer 2020-02-16 16:04:41 -07:00
verilog_auxiliary_netlists.cpp bring preprocessing flag Verilog netlists online 2020-02-16 00:03:24 -07:00
verilog_auxiliary_netlists.h bring preprocessing flag Verilog netlists online 2020-02-16 00:03:24 -07:00
verilog_constants.h add grid module Verilog writer 2020-02-16 16:04:41 -07:00
verilog_decoders.cpp use constant module manager as much as possible in Verilog writer 2020-02-16 16:35:26 -07:00
verilog_decoders.h use constant module manager as much as possible in Verilog writer 2020-02-16 16:35:26 -07:00
verilog_essential_gates.cpp use constant module manager as much as possible in Verilog writer 2020-02-16 16:35:26 -07:00
verilog_essential_gates.h use constant module manager as much as possible in Verilog writer 2020-02-16 16:35:26 -07:00
verilog_grid.cpp add grid module Verilog writer 2020-02-16 16:04:41 -07:00
verilog_grid.h add grid module Verilog writer 2020-02-16 16:04:41 -07:00
verilog_lut.cpp use constant module manager as much as possible in Verilog writer 2020-02-16 16:35:26 -07:00
verilog_lut.h use constant module manager as much as possible in Verilog writer 2020-02-16 16:35:26 -07:00
verilog_memory.cpp use constant module manager as much as possible in Verilog writer 2020-02-16 16:35:26 -07:00
verilog_memory.h use constant module manager as much as possible in Verilog writer 2020-02-16 16:35:26 -07:00
verilog_module_writer.cpp print verilog module writer online 2020-02-16 12:04:03 -07:00
verilog_module_writer.h print verilog module writer online 2020-02-16 12:04:03 -07:00
verilog_mux.cpp adapt all the Verilog submodule writers and bring it onlien 2020-02-16 13:35:18 -07:00
verilog_mux.h adapt Verilog mux writer 2020-02-16 12:35:41 -07:00
verilog_options.cpp adapt all the Verilog submodule writers and bring it onlien 2020-02-16 13:35:18 -07:00
verilog_options.h adapt all the Verilog submodule writers and bring it onlien 2020-02-16 13:35:18 -07:00
verilog_port_types.h start transplanting fpga_verilog 2020-02-15 15:03:00 -07:00
verilog_routing.cpp add grid module Verilog writer 2020-02-16 16:04:41 -07:00
verilog_routing.h routing module Verilog writer is online 2020-02-16 14:47:54 -07:00
verilog_submodule.cpp use constant module manager as much as possible in Verilog writer 2020-02-16 16:35:26 -07:00
verilog_submodule.h adapt all the Verilog submodule writers and bring it onlien 2020-02-16 13:35:18 -07:00
verilog_submodule_utils.cpp adapt all the Verilog submodule writers and bring it onlien 2020-02-16 13:35:18 -07:00
verilog_submodule_utils.h put verilog submodules online. ready to bring the how submodule writer online 2020-02-16 11:41:20 -07:00
verilog_top_module.cpp bring FPGA top module verilog writer online. Fabric Verilog generator done 2020-02-16 16:18:14 -07:00
verilog_top_module.h bring FPGA top module verilog writer online. Fabric Verilog generator done 2020-02-16 16:18:14 -07:00
verilog_wire.cpp use constant module manager as much as possible in Verilog writer 2020-02-16 16:35:26 -07:00
verilog_wire.h use constant module manager as much as possible in Verilog writer 2020-02-16 16:35:26 -07:00
verilog_writer_utils.cpp bring FPGA top module verilog writer online. Fabric Verilog generator done 2020-02-16 16:18:14 -07:00
verilog_writer_utils.h adapt verilog writer utils 2020-02-15 23:26:59 -07:00