Commit Graph

269 Commits

Author SHA1 Message Date
tangxifan d96ffdc00c [Doc] Bug fix in importing imgconverter package 2021-02-07 11:52:04 -07:00
tangxifan 49fc903bfb [Doc] Add img converter to conf.py 2021-02-07 11:44:41 -07:00
tangxifan 6b6f4bc763 [Doc] Try use image converter instead of svg2pdf which requires more dependencies 2021-02-07 11:40:18 -07:00
tangxifan 05fea49b87 [Doc] Skip youtube video when building pdf; Apply SVG2PDF converter so that svg images can be included in the pdf 2021-02-07 10:35:20 -07:00
tangxifan f6ec558bc2 [Doc] Now embed video in the documentation 2021-02-06 19:45:41 -07:00
tangxifan a4b9199737 [Doc] Add tutorial about fabric netlist generation 2021-02-06 17:46:56 -07:00
tangxifan 1ff597ea66 [Doc] Add tutorial video links to documentation 2021-02-06 17:16:15 -07:00
AurelienAlacchi 00fc3d7622
Merge pull request #217 from lnis-uofu/dev
Synchronize the out-of-date XML syntax 'disable_in_pack' with VPR upstream
2021-02-05 09:53:28 -07:00
tangxifan c4fe9a67f7
Merge pull request #215 from lnis-uofu/compilation_fixes
Changed readthedocs.io dependencies link
2021-02-05 09:42:15 -07:00
tangxifan 9b5c64f35f [Doc] Update documentation about disable_packing syntax 2021-02-04 16:41:24 -07:00
Andrew Pond fe806f8ac3 changed docs dependencies link 2021-02-04 10:58:59 -08:00
tangxifan d83158654c [Doc] Add a draft documentation about the bitstream setting 2021-02-01 22:33:17 -07:00
tangxifan 0e16638dc2 [Doc] Update documentation about the changes on activity files 2021-01-29 11:49:07 -07:00
tangxifan 78ad9cd000 [Doc] Add version command/option to documentation 2021-01-27 16:06:45 -07:00
Ganesh Gore 0a29529731 [Docs] Added CI/CD docs 2021-01-26 16:26:43 -07:00
tangxifan d53d3963d4 [Doc] Broken link fix in config protocol documentation 2021-01-26 14:05:11 -07:00
tangxifan 97f8bccce3 [Doc] Add openfpga floorplanning to the overview part of documentation 2021-01-26 14:00:51 -07:00
tangxifan 4d5b63a685 [Doc] Fine-tune format on FPGA-SDC motivation 2021-01-26 11:04:31 -07:00
tangxifan 22a01cdb05 [Doc] Fine-tuned figure about openfpga tools to provide a clear borderline between openfpga shell and other tools/files 2021-01-26 10:36:34 -07:00
tangxifan 9fefe1502f [Doc] Typo fix on write_fabric_key option 2021-01-25 15:18:16 -07:00
tangxifan dd0680246a [Doc] Typo fix on fabric key command 2021-01-25 14:12:40 -07:00
ganeshgore 1ba7e0663f
Merge pull request #176 from lnis-uofu/dev
Documentation Formatting
2021-01-24 21:11:49 -07:00
tangxifan e18c533657 [Doc] Add new openfpga shell command to documentation 2021-01-24 14:48:56 -07:00
tangxifan 815468ac65 [Doc] Add shortcut to call pin constraint option to documentation 2021-01-20 09:20:51 -07:00
tangxifan 977ff52cb1 [Doc] Format openfpga command documentation by using option views 2021-01-19 20:26:38 -07:00
tangxifan e9dc708d66 [Doc] Group file format documentation into a unified section 2021-01-19 19:44:44 -07:00
tangxifan ac8c63553a [Doc] Add file format index file 2021-01-19 18:07:53 -07:00
tangxifan fbb5c0cf8f [Doc] Add pin constraints to documentation 2021-01-19 18:04:45 -07:00
tangxifan c7f02601ab [Doc] Add repack design constraints to documentation 2021-01-17 12:59:46 -07:00
tangxifan c4d3e7c50c [Doc] Update documentation for the new XML syntax in simulation settings 2021-01-15 12:30:26 -07:00
tangxifan 0c808bec41 [Doc] Add clarification for defining multi-bit global tile ports 2021-01-09 20:00:16 -07:00
tangxifan 2324edc522 [Doc] Update documentation for upgraded tile annotation 2021-01-09 18:55:16 -07:00
tangxifan 226f6b8d6d [Doc] Update documentation about FF circuit models to show capability in modeling SCFFs 2021-01-04 18:30:04 -07:00
Lalit Sharma 3ccd6b80dd Updating compile.rst file with updated compilation steps 2020-12-13 21:04:10 -08:00
tangxifan 406edeec89 [Doc] Typo fix 2020-12-04 15:07:02 -07:00
tangxifan 4fe190fa7e [Doc] Bug fix in LUT circuit model documentation 2020-12-04 14:44:27 -07:00
tangxifan 8350b0f911 [Doc] Update documentation about default value definition in tile annotation 2020-12-02 17:08:34 -07:00
tangxifan cc0114459a [Doc] Enrich examples for LUT circuit models 2020-11-26 13:03:12 -07:00
tangxifan 62e804215b [Doc] Add svg figures for LUT examples 2020-11-26 12:35:39 -07:00
tangxifan b857135f4e [Doc] Add clarification about which cells are applicable for signal initialization 2020-11-23 15:19:15 -07:00
tangxifan 2b9a97729e [Doc] Update documentation to clarify the port sequence for MUX2 and pass-gate logic circuit models 2020-11-23 15:09:47 -07:00
tangxifan fd0e6814ea [Doc] Update documentation about the pre-processing flags 2020-11-22 20:33:15 -07:00
tangxifan f6126d1ed6 [Doc] Add illustrative example to diff between global ports definitions 2020-11-12 09:24:39 -07:00
tangxifan bc43c876b0 [Doc] Update documentation for the rules in global port definition for tile ports 2020-11-11 14:10:11 -07:00
tangxifan 2c269c532a [Doc] Update doc for the global port definition using physical tile port 2020-11-10 20:48:28 -07:00
tangxifan 056b7c0c79 [Doc] Update documentation about CCFF circuit model examples 2020-11-06 12:22:22 -07:00
tangxifan 55b14fa6b4 Merge branch 'master' of https://github.com/LNIS-Projects/OpenFPGA into dev 2020-11-06 10:11:38 -07:00
tangxifan 849ecc7fc0 [Doc] Add notes for using the is_data_io syntax 2020-11-05 09:30:19 -07:00
tangxifan 9bce2f3818 [Doc] Update documentation for new XML syntax "is_data_io" 2020-11-05 09:28:46 -07:00
tangxifan 032cbfb8b2
Merge pull request #113 from LNIS-Projects/dev
Multi-region support on Frame-based Configuration Protocol
2020-10-31 10:37:38 -06:00