tangxifan
|
64698443c9
|
[core] fixed a bug on io location map for tile modules
|
2023-07-24 22:11:57 -07:00 |
tangxifan
|
2105abdbca
|
[core] fixed a bug
|
2023-07-24 21:26:29 -07:00 |
tangxifan
|
e7d714b94d
|
[core] fixed a bug on the tile module port addition: some grid output was not pulled out
|
2023-07-24 21:21:25 -07:00 |
tangxifan
|
b8d080b08e
|
[core] fixed a bug where undriven cb ports are not connected to tile
|
2023-07-24 20:40:25 -07:00 |
tangxifan
|
3745897ff6
|
[core] fixed a few bugs
|
2023-07-24 16:10:29 -07:00 |
tangxifan
|
48b0ba8b78
|
[core] format
|
2023-07-24 15:00:26 -07:00 |
tangxifan
|
4294914987
|
[core] fixed compiler warnings
|
2023-07-24 14:59:43 -07:00 |
tangxifan
|
812473ef04
|
[core] fixed the bug on io location map for tiled top module
|
2023-07-24 14:50:39 -07:00 |
tangxifan
|
da36b735c6
|
[core] syntax
|
2023-07-24 12:13:45 -07:00 |
tangxifan
|
f031148959
|
[core] syntax
|
2023-07-23 22:39:36 -07:00 |
tangxifan
|
f551188d0f
|
[core] developed tile directs to support tile modules
|
2023-07-23 21:45:45 -07:00 |
tangxifan
|
14666f3ae5
|
[core] sync
|
2023-07-23 20:45:59 -07:00 |
tangxifan
|
0b3b7b5472
|
[core] hotfix
|
2023-07-23 13:39:06 -07:00 |
tangxifan
|
1ee7448070
|
[core] supporting tile annotation (for global port) in tile modules
|
2023-07-23 13:38:16 -07:00 |
tangxifan
|
399259ea1d
|
[core] adding prog clock arch support for tile modules
|
2023-07-23 13:11:13 -07:00 |
tangxifan
|
0f3f4b0d81
|
[core] now tile module use unique port name (for heterogeneous blocks)
|
2023-07-22 23:55:54 -07:00 |
tangxifan
|
003d9515ff
|
[core] developing tile-based top module builder
|
2023-07-22 17:13:30 -07:00 |
tangxifan
|
93c5a68592
|
[core] developing top-level nets for tiles
|
2023-07-21 23:21:53 -07:00 |
tangxifan
|
fcf308fcd6
|
[core] developing inter-tile connections for top module
|
2023-07-20 23:00:35 -07:00 |
tangxifan
|
b70f7fb1b6
|
[core] now option conflicts in command 'build_fabric' can error out
|
2023-07-20 21:22:07 -07:00 |
tangxifan
|
6b92299e39
|
[core] start working on the net build-up for tile instances under the top-level module
|
2023-07-20 17:38:13 -07:00 |
tangxifan
|
88c5d122ca
|
[core] syntax
|
2023-07-20 17:12:10 -07:00 |
tangxifan
|
db179ec4bb
|
[core] split tile instance builder and the classic fine-grained builder
|
2023-07-20 17:07:07 -07:00 |
tangxifan
|
ef214f4590
|
[core] code format
|
2023-07-20 17:00:29 -07:00 |
tangxifan
|
6458580e3e
|
[core] move child instance builder to a separated source file as these codes are expanding in size
|
2023-07-20 16:59:39 -07:00 |
tangxifan
|
bd265334b5
|
[core] added tile instances to top module builder
|
2023-07-19 23:26:55 -07:00 |
tangxifan
|
a06b9a0f48
|
[core] now start to develop the tile instances under the top module
|
2023-07-19 22:22:07 -07:00 |
tangxifan
|
2e69eebea0
|
[core] now tile module builder is working
|
2023-07-19 17:23:44 -07:00 |
tangxifan
|
0d03d7b483
|
[core] now fabric tile cache both grid and gsb coord for pb
|
2023-07-19 17:20:53 -07:00 |
tangxifan
|
778d03610c
|
[core] debugging
|
2023-07-19 15:27:05 -07:00 |
tangxifan
|
001b3b3f8b
|
[core] debugging
|
2023-07-19 14:38:07 -07:00 |
tangxifan
|
d03fa92ddf
|
[core] debugging
|
2023-07-19 12:49:35 -07:00 |
tangxifan
|
48e207d3e4
|
[core] debugging
|
2023-07-19 12:22:57 -07:00 |
tangxifan
|
6607bb7e48
|
[core] now fpga verilog supports tile modules
|
2023-07-18 22:35:22 -07:00 |
tangxifan
|
5ae146bd86
|
[core] finish up tile module builder
|
2023-07-18 21:17:40 -07:00 |
tangxifan
|
0dcec9d8e5
|
[core] finishing up tile module builder
|
2023-07-18 17:56:27 -07:00 |
tangxifan
|
403ed4ea60
|
[core] still developing tile module port and net builder
|
2023-07-18 16:03:47 -07:00 |
tangxifan
|
aabcc25567
|
[core] developing tile module port and net builder
|
2023-07-17 23:06:55 -07:00 |
tangxifan
|
ba4b7e3522
|
[core] developing tile module builder
|
2023-07-16 15:18:09 -07:00 |
tangxifan
|
98c598cec2
|
[core] unique tile identifier done
|
2023-07-15 22:54:33 -07:00 |
tangxifan
|
ea8d128789
|
[core] syntax
|
2023-07-15 20:29:21 -07:00 |
tangxifan
|
c2ef5ca408
|
[core] developing top-left style tile info
|
2023-07-14 22:48:44 -07:00 |
tangxifan
|
091ac88c7e
|
[lib] code format
|
2023-07-14 12:16:40 -07:00 |
tangxifan
|
3bc959dcec
|
[lib] create tile config lib and start integration to core
|
2023-07-14 12:13:31 -07:00 |
tangxifan
|
c58035dbd4
|
[core] start developing option --group_tile for build_fabric
|
2023-07-14 11:01:04 -07:00 |
tangxifan
|
3de4d3fc09
|
[core] add a new command 'write_fabric_key' and now writer supports module-level keys
|
2023-07-08 18:12:51 -07:00 |
tangxifan
|
433391eec4
|
[core] move new functions to a separated source file
|
2023-07-07 15:03:03 -07:00 |
tangxifan
|
d3aa4c53d0
|
[core] now support rebuild configuarable children for ccff submodules
|
2023-07-07 14:51:21 -07:00 |
tangxifan
|
a1b13b8e12
|
[core] overload submodule configurable children from fabric key
|
2023-07-06 22:47:57 -07:00 |
tangxifan
|
d3109ee88b
|
[core] developing configurable children reloading from fabric key
|
2023-07-06 21:53:22 -07:00 |