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[core] now tile module builder is working

This commit is contained in:
tangxifan 2023-07-19 17:23:44 -07:00
parent 0d03d7b483
commit 2e69eebea0
1 changed files with 1 additions and 1 deletions
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2
openfpga/src/fabric/build_tile_modules.cpp
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@ -423,7 +423,7 @@ static int build_tile_module_port_and_nets_between_cb_and_pb(
++pin_id) {
ModuleNetId net = create_module_source_pin_net(
module_manager, tile_module, src_cb_module, src_cb_instance,
sink_tile_port_id, src_cb_port.pins()[pin_id]);
src_cb_port_id, src_cb_port.pins()[pin_id]);
/* Configure the net sink */
module_manager.add_module_net_sink(tile_module, net, tile_module, 0,
sink_tile_port_id,