Commit Graph

2705 Commits

Author SHA1 Message Date
tangxifan ca7d43275d [Test] Add test case for multi_region configuration frame 2020-10-30 10:48:29 -06:00
tangxifan 29da368742 [Arch] Add architecture example for multi-region frame-based architecture using both set/reset for configurable memories 2020-10-30 10:46:47 -06:00
tangxifan b701bd2640 [Arch] Add multi-region architecture example for frame-based protocol 2020-10-30 10:45:14 -06:00
tangxifan 0d77916041 [Tool] Support multi-region frame-based configuration protocol 2020-10-30 10:43:11 -06:00
Laboratory for Nano Integrated Systems (LNIS) cd0d3dd798
Merge pull request #112 from LNIS-Projects/dev
Multi-region Memory Bank Configuration Protocol Support
2020-10-29 18:39:44 -06:00
tangxifan 1d930d1b5d [Architecture] Add missing arch files and bug fix 2020-10-29 18:08:26 -06:00
tangxifan 8ef6ae32fb [Tool] Bug fix for bitstream estimator due to the current special status of frame-based protocol 2020-10-29 17:35:55 -06:00
tangxifan c2c384e24b [Doc] update documentation about memory bank definition 2020-10-29 17:04:25 -06:00
tangxifan 1ad591c08c [Test] Add smart fast configuration test cases for multi-region memory banks to CI 2020-10-29 16:33:54 -06:00
tangxifan 153b265a6d [Architecture] Add openfpga architecture using multiple memory banks whose memory cell has both reset and set 2020-10-29 16:32:05 -06:00
tangxifan 241ebf054a [Test] Add a test case for validating fast configuration techniques on multi-region memory banks 2020-10-29 16:29:46 -06:00
tangxifan 51f2e7f625 [Test] Add multi-region memory bank test case to CI 2020-10-29 16:28:03 -06:00
tangxifan 987eccf586 [Tool] Bug fix in multi-region memory bank; Basic test passed 2020-10-29 16:26:45 -06:00
tangxifan ff386001c4 [Test] Add openfpga task for multi-region memory banks 2020-10-29 13:56:32 -06:00
tangxifan 7534474423 [Arch] Add architecture for multiple-region memory banks 2020-10-29 13:54:51 -06:00
tangxifan 448e88645a [Tool] Support multiple memory banks in top-level module 2020-10-29 12:42:03 -06:00
tangxifan bd49ea95d4 [Tool] Add function to comput configuration bits by region 2020-10-28 12:37:09 -06:00
tangxifan 446f982410 [Tool] Add warning when number of regions defined in fabric key is different than architecture 2020-10-28 11:43:05 -06:00
Laboratory for Nano Integrated Systems (LNIS) ff9c17cba8
Merge pull request #111 from LNIS-Projects/dev
Bug fix in tutorial due to renamed regression tests
2020-10-28 09:40:28 -06:00
tangxifan efb0162e3f [Doc] Bug fix in tutorial due to renamed regression tests 2020-10-28 08:58:19 -06:00
Laboratory for Nano Integrated Systems (LNIS) 8b85f22533
Merge pull request #109 from LNIS-Projects/dev
Frontpage README Update with more links to documentation pages
2020-10-27 21:52:35 -06:00
tangxifan 29431394a8 [Doc] Add links to the technical summary in documentation for README 2020-10-27 10:08:25 -06:00
tangxifan 90e6021e43 [Doc] Update README with more links to documentation 2020-10-27 09:53:57 -06:00
Laboratory for Nano Integrated Systems (LNIS) d984547258
Merge pull request #108 from LNIS-Projects/dev
Add test cases for constant inputs of routing multiplexers
2020-10-14 22:33:14 -06:00
tangxifan 63f130d948 [Test] Deploy none constant input test case to CI 2020-10-13 12:04:07 -06:00
tangxifan 179ae355d0 [Test] Do not run icarus verification for non const input test case. Icarus cannot handle the comb. loops 2020-10-13 12:02:26 -06:00
tangxifan 97c3bf7ea0 [Test] Add a test case for non-constant input multiplexers 2020-10-13 11:58:17 -06:00
tangxifan c5bcd93408 [Architecture] Add the example architecture where std cell-based multiplexers do not have a constant input 2020-10-13 11:57:21 -06:00
tangxifan e5facf8866 [Test] Deploy const gnd test case to CI 2020-10-13 11:40:49 -06:00
tangxifan 99b1e68d92 [Architecture] Add architecture using GND as constant inputs for multiplexers 2020-10-13 11:39:27 -06:00
tangxifan 570b494df7 [Test] Add test case for using GND signal as constant input for routing multiplexers 2020-10-13 11:38:54 -06:00
Laboratory for Nano Integrated Systems (LNIS) 16128f0905
Merge pull request #107 from LNIS-Projects/dev
Enable Customized Fabric Netlist Location in Verilog Testbench Generation
2020-10-12 13:47:40 -06:00
tangxifan 6b6c018945 [Test] Add the new test case to CI 2020-10-12 12:54:51 -06:00
tangxifan dc68c52d0a [Test] Now use a light architecture to speed up the test case runtime 2020-10-12 12:53:34 -06:00
tangxifan e59377a3ec [Flow] bug fix in the sample script for fabric netlist customization 2020-10-12 12:52:01 -06:00
tangxifan 8941e38613 [Test] Enable verification in the new test case 2020-10-12 12:50:08 -06:00
tangxifan 9e1fd300dc [Test] Add test case for customized location of fabric netlists 2020-10-12 12:47:58 -06:00
tangxifan e510e79c12 [Flow] Add openfpga shell example script to use fabric netlist option 2020-10-12 12:42:43 -06:00
tangxifan 3aeea724de [Documentation] Update for new options in fpga-verilog 2020-10-12 12:36:24 -06:00
tangxifan 1ef0898f41 [Tool] Now users can specify a different fabric netlist when generating Verilog testbench 2020-10-12 12:31:51 -06:00
Laboratory for Nano Integrated Systems (LNIS) 5efe1ae77d
Merge pull request #106 from LNIS-Projects/dev
Documentation update
2020-10-10 23:16:37 -06:00
tangxifan ccaa697e5a [Documentation] Add links to technical features to examples 2020-10-10 22:40:37 -06:00
tangxifan ea3a1b785c [Documentation] Fix the path to OpenFPGA logo in the README 2020-10-10 21:44:18 -06:00
Laboratory for Nano Integrated Systems (LNIS) 8493345b52
Merge pull request #105 from LNIS-Projects/dev
Misc Update: Analysis SDC renaming and Addition of test case for fracturable LUT switch by AND gates
2020-10-10 21:43:02 -06:00
tangxifan b8c20959b6 [Regression test] Add new test case to CI 2020-10-10 20:29:00 -06:00
tangxifan 82e7b159ce [Regression test] Add test case for fracturable LUT using AND gate to switch modes 2020-10-10 20:26:41 -06:00
tangxifan d0014878d5 [Architecture] Add an openfpga architecture using and gate to control fracturable LUT modes 2020-10-10 20:24:57 -06:00
tangxifan 721bcce373 [Tool] Change analysis SDC file name to track netlist name 2020-10-10 17:43:35 -06:00
tangxifan 5fece94e7c
Merge pull request #103 from lukefahr/doc_fix
Docs:  Updated note to enable VPR's GUI
2020-10-08 15:56:44 -06:00
tangxifan 521accdc88
Merge pull request #104 from lukefahr/disp_fix
FLOW:  fixed display flag
2020-10-07 09:54:06 -06:00