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[Test] Deploy none constant input test case to CI

This commit is contained in:
tangxifan 2020-10-13 12:04:07 -06:00
parent 179ae355d0
commit 63f130d948
1 changed files with 3 additions and 0 deletions
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.travis/fpga_verilog_reg_test.sh
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@ -73,6 +73,9 @@ python3 openfpga_flow/scripts/run_fpga_task.py fpga_verilog/mux_design/outbuf_on
echo -e "Testing Verilog generation with routing multiplexers with constant gnd input";
python3 openfpga_flow/scripts/run_fpga_task.py fpga_verilog/mux_design/const_input_gnd --debug --show_thread_logs
echo -e "Testing Verilog generation with routing multiplexers without constant inputs";
python3 openfpga_flow/scripts/run_fpga_task.py fpga_verilog/mux_design/no_const_input --debug --show_thread_logs
echo -e "Testing Verilog generation with behavioral description";
python3 openfpga_flow/scripts/run_fpga_task.py fpga_verilog/behavioral_verilog --debug --show_thread_logs