tangxifan
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40d11a45d9
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[Test] Disable ACE2 in implicit verilog test cases due to Yosys upgrade
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2021-10-30 14:49:56 -07:00 |
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tangxifan
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b7ad61227d
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[Flow] Flatten the synthesis recipe in default yosys script to disable the mapping on DFFE and SDFF
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2021-10-30 14:47:37 -07:00 |
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tangxifan
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ec184ef532
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[Flow] Flatten the synthesis recipe in default yosys script to disable the mapping on DFFE and SDFF
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2021-10-30 14:46:12 -07:00 |
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tangxifan
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0b770f3330
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[Flow] Disable DFFE and SDFF in no-ff Yosys scripts
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2021-10-30 14:36:43 -07:00 |
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tangxifan
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59a622a910
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[Flow] Disable DFFE and SDFF in no-ff Yosys scripts
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2021-10-30 14:34:37 -07:00 |
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tangxifan
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978c60e75b
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[Flow] Disable DFFE and SDFF in no-ff Yosys scripts
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2021-10-30 13:29:38 -07:00 |
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tangxifan
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18bab18032
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[Test] Disable all the quicklogic tests due to missing support in Yosys v0.10 release
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2021-10-30 13:20:58 -07:00 |
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tangxifan
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16de60e943
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[Test] Turn off ACE2 run in bitstream generation only flows
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2021-10-30 12:31:14 -07:00 |
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tangxifan
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94328351be
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[Script] Replace deprecated ``rmdff`` in out-of-date yosys scripts
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2021-10-30 12:00:06 -07:00 |
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tangxifan
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91627abe12
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[FPGA-Verilog] Fixed a bug on the non-inverted reset signal in testbenches when pin constraints are provided
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2021-10-30 11:53:46 -07:00 |
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tangxifan
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0a449cc24c
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[HDL] Fixed critical bugs in multi-mode FF HDL modeling, which caused reset signal unconnected
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2021-10-30 11:45:01 -07:00 |
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tangxifan
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9c06041ce4
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[Flow] Update yosys script by replacing the deprecated command 'opt_rmdff` with `opt_dff`
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2021-10-30 11:27:40 -07:00 |
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tangxifan
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e8b3c68565
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[Github] Now use YosysHQ v0.10 release as a submodule
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2021-10-29 14:19:26 -07:00 |
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tangxifan
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104e177e37
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[Git] Update yosys submodule:
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2021-10-29 14:17:42 -07:00 |
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tangxifan
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aece87b0c8
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[Github] debugging
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2021-10-29 14:15:16 -07:00 |
|
tangxifan
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39fa050b3b
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[Github] debugging
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2021-10-29 14:13:02 -07:00 |
|
tangxifan
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f2ce2e6126
|
[Github] debugging
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2021-10-29 14:11:45 -07:00 |
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tangxifan
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b213faaf81
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[Git] Add YosysHQ as a submodule in the place of QuickLogic Yosys
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2021-10-29 13:54:15 -07:00 |
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tangxifan
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ddf96fc23a
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Merge pull request #397 from lnis-uofu/gg_ci_cd_dev
Updated CI documentation
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2021-10-28 15:27:37 -07:00 |
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tangxifan
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2d9ecb5678
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Merge pull request #400 from lnis-uofu/mult_36
Fixed port names for mult_36x36
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2021-10-27 09:35:42 -07:00 |
Aram Kostanyan
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2eef21a1af
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Fixed port names for mult_36x36
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2021-10-26 19:14:43 +05:00 |
Ganesh Gore
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130805d50c
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Updated CI documentation
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2021-10-21 15:17:30 -06:00 |
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tangxifan
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c35c9bad55
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Merge pull request #396 from lnis-uofu/gg_ci_cd_dev
[Bugfix] CI docker image build
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2021-10-20 15:02:43 -07:00 |
ganeshgore
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c5f00900a9
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Merge branch 'master' into gg_ci_cd_dev
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2021-10-20 15:00:13 -06:00 |
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Ganesh Gore
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f0d81f7ffc
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[Bugfix] docker CI build
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2021-10-20 14:50:17 -06:00 |
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tangxifan
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5e912b3c51
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Merge pull request #392 from lnis-uofu/gg_ci_cd_dev
Make CI Portable
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2021-10-19 08:33:38 -07:00 |
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Ganesh Gore
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de53943208
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Removed dummy changes
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2021-10-18 21:43:05 -06:00 |
|
Ganesh Gore
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ba7a676429
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Updated docker yml
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2021-10-18 21:42:39 -06:00 |
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Ganesh Gore
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ed5942ce56
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Added DOCKER_REPO variable
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2021-10-18 20:00:21 -06:00 |
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Ganesh Gore
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32f234f4fc
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Made LNIS Repo as default
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2021-10-18 12:54:31 -06:00 |
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Ganesh Gore
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fdc9e318fd
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[CI] Addding conditional docker push
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2021-10-18 12:18:35 -06:00 |
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Ganesh Gore
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d37ae8a8c5
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Changed docker repo to github repository
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2021-10-18 11:34:59 -06:00 |
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Ganesh Gore
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b47af70bb0
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Merge branch 'master' into gg_ci_cd_dev
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2021-10-18 11:17:57 -06:00 |
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ganeshgore
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36f847042d
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Merge pull request #391 from xtofalex/xtof_fixes
Typo fixes, detail error message in case of exception and message formatting in scripts
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2021-10-18 11:12:07 -06:00 |
Christophe Alexandre
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c42acec81e
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Fixing python string formatting: clean_up_and_exit calls in run_fpga_flow.py
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2021-10-18 10:45:35 +00:00 |
|
Christophe Alexandre
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c3dd704bf3
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Fixing typo in run_fpga_flow.py
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2021-10-18 09:13:42 +00:00 |
|
Christophe Alexandre
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d411967159
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Fixing small typo in run_fpga_flow.py
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2021-10-15 10:01:12 +00:00 |
|
Christophe Alexandre
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1017a6a619
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Fixing small typo in openfpga.sh
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2021-10-11 13:52:31 +00:00 |
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ganeshgore
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d85e55aef2
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Merge pull request #385 from coolbreeze413/add-wget-to-dependencies
add wget to list of dependencies
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2021-10-07 21:04:29 -06:00 |
coolbreeze413
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f60f5b4ae5
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add wget to list of dependencies
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2021-10-08 03:22:30 +05:30 |
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tangxifan
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1603c9b404
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Merge pull request #374 from foggy-slt/patch-1
Update fpgaflow_default_tool_path.conf
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2021-09-21 19:02:29 -07:00 |
slt
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b867db815f
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Update fpgaflow_default_tool_path.conf
Update regex for VPR
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2021-09-17 14:02:26 +08:00 |
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tangxifan
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30feb78469
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Merge pull request #364 from lnis-uofu/tutorials
Tutorials
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2021-09-04 19:07:46 -07:00 |
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tangxifan
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801b91f776
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Merge branch 'master' into tutorials
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2021-08-31 17:17:40 -07:00 |
Andrew Pond
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3c041b6012
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Merge pull request #363 from lnis-uofu/compilation_readme
Update compile.rst
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2021-08-17 11:08:14 -06:00 |
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Andrew Pond
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7537118843
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Merge branch 'master' into compilation_readme
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2021-08-17 10:19:31 -06:00 |
ANDREW HARRIS POND
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1c09b8c3e0
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fixed python instruction
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2021-08-17 10:18:51 -06:00 |
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ganeshgore
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d14a7f74f0
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Merge pull request #366 from WRansohoff/accept_absolute_task_paths
Accept absolute project paths in the 'run_fpga_task.py' script
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2021-08-13 11:17:33 -06:00 |
Will
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c31c1d8b04
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Accept absolute project paths as inputs to the 'run_fpga_task.py' script.
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2021-08-13 11:08:09 -04:00 |
bbleaptrot
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814d290463
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Merge branch 'master' into tutorials
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2021-08-05 10:24:34 -06:00 |