Fixing small typo in run_fpga_flow.py

This commit is contained in:
Christophe Alexandre 2021-10-15 10:01:12 +00:00
parent 1017a6a619
commit d411967159
1 changed files with 1 additions and 1 deletions

View File

@ -271,7 +271,7 @@ def main():
if (args.fpga_flow == "vpr_blif"):
collect_files_for_vpr()
logger.info("Runing OpenFPGA Shell Engine ")
logger.info("Running OpenFPGA Shell Engine ")
run_openfpga_shell()
if args.end_flow_with_test:
run_netlists_verification()