tangxifan
|
9690cea115
|
[core] fix clang syntax
|
2023-04-19 15:46:42 +08:00 |
tangxifan
|
cb4512b925
|
[core] code format
|
2023-04-19 11:10:42 +08:00 |
tangxifan
|
a84cc52d7c
|
[core] fixed a few bugs due to the changes in vtr regarding flat router
|
2023-04-19 11:08:18 +08:00 |
tangxifan
|
f25dc461dc
|
[code] format
|
2023-01-31 12:52:59 -08:00 |
tangxifan
|
f00acf1e62
|
[code] fixed all the compiler warnings under openfpga/src
|
2023-01-31 12:51:52 -08:00 |
tangxifan
|
46368de6ff
|
[script] now cmake allows strict compilation
|
2023-01-31 12:41:15 -08:00 |
tangxifan
|
101bb40d40
|
[engine] code format
|
2023-01-20 21:52:32 -08:00 |
tangxifan
|
059f8ca112
|
[engine] fixed a bug in repack when only invisible routing sinks are found
|
2023-01-20 21:50:59 -08:00 |
tangxifan
|
693404d1ac
|
[engine] code format
|
2023-01-19 11:23:34 -08:00 |
tangxifan
|
3bcec24dca
|
[engine] fixed a bug
|
2023-01-19 11:22:44 -08:00 |
tangxifan
|
2ba4249518
|
[engine] add black list for repacker to pick routing traces
|
2023-01-19 11:01:31 -08:00 |
tangxifan
|
ac8c0e243c
|
[core] code format
|
2023-01-15 12:13:59 -08:00 |
tangxifan
|
cab7e04901
|
[core] fixed a bug in repacker to avoid routing constrained nets
|
2023-01-15 12:13:12 -08:00 |
tangxifan
|
2a0e512ac9
|
[code] format
|
2023-01-14 23:05:42 -08:00 |
tangxifan
|
4242c39b01
|
[core] fixed a bug in handling design constraints in repack
|
2023-01-14 23:05:04 -08:00 |
tangxifan
|
c55d54d325
|
[code] format
|
2023-01-11 17:19:04 -08:00 |
tangxifan
|
c00c43cbd4
|
[core] fixed a few bugs
|
2023-01-11 16:39:25 -08:00 |
tangxifan
|
9bbb09ef0f
|
[core] adding a new command 'exec_external' to run system call
|
2023-01-11 16:31:26 -08:00 |
tangxifan
|
b569d6b603
|
[core] format
|
2023-01-07 11:40:17 -08:00 |
tangxifan
|
c7a4d25e35
|
[core] now all the commands can be optionally hidden
|
2023-01-07 11:36:10 -08:00 |
tangxifan
|
4385b364af
|
[code] now setup command can be hidden optionally
|
2023-01-07 11:18:43 -08:00 |
tangxifan
|
9b5b1b0da7
|
[core] clang syntax error
|
2023-01-07 09:18:58 -08:00 |
tangxifan
|
52e803804d
|
[core] add missing file
|
2023-01-06 22:37:55 -08:00 |
tangxifan
|
279e790fd8
|
[core] rename file to avoid collision
|
2023-01-06 21:41:52 -08:00 |
tangxifan
|
2fc047daff
|
[core] format
|
2023-01-06 21:11:12 -08:00 |
tangxifan
|
cf824e7161
|
[core] now bitstream commands follow templates
|
2023-01-06 21:08:50 -08:00 |
tangxifan
|
26c294679a
|
[core] now setup commands follow templates
|
2023-01-06 20:52:37 -08:00 |
tangxifan
|
a99794f51c
|
[core] now FPGA-SDC commands follow templates
|
2023-01-06 19:22:51 -08:00 |
tangxifan
|
401b640852
|
[core] format
|
2023-01-06 17:50:47 -08:00 |
tangxifan
|
12134f4106
|
[core] now openfpga verilog commands follow templates
|
2023-01-06 17:48:00 -08:00 |
tangxifan
|
93c00207ab
|
[core] now command functions are templates, which can be used by other extensions
|
2023-01-06 17:23:01 -08:00 |
tangxifan
|
5606566839
|
[engine] format
|
2023-01-01 17:37:44 -08:00 |
tangxifan
|
7610e536bf
|
[engine] now 'source' command can be seen in help desk
|
2023-01-01 12:01:37 -08:00 |
tangxifan
|
76570e653c
|
[engine] format
|
2023-01-01 10:23:18 -08:00 |
tangxifan
|
c90f8389f1
|
[engine] debugged
|
2023-01-01 10:22:47 -08:00 |
tangxifan
|
8d947c7bdb
|
[engine] now developers can write their superset command based on other commands through openfpga shell
|
2023-01-01 10:10:09 -08:00 |
tangxifan
|
bffb4eedc9
|
[engine] typo
|
2022-12-30 18:18:51 -08:00 |
tangxifan
|
d329f0bb44
|
[engine] code format
|
2022-12-30 18:17:19 -08:00 |
tangxifan
|
5c4e749b95
|
[engine] add standalone vpr commands
|
2022-12-30 18:12:51 -08:00 |
tangxifan
|
90bbb50047
|
[script] rename shared library name for tcl, so that it is straightforward to load in tcl
|
2022-12-01 15:59:52 -08:00 |
tangxifan
|
338e191f77
|
[script] enable swig flags when compiling vtr
|
2022-12-01 15:16:58 -08:00 |
tangxifan
|
78d4991a4e
|
[script] add missing flags required
|
2022-12-01 14:49:05 -08:00 |
tangxifan
|
33b400de39
|
[script] compilation passed but failed when loading .so to tclsh
|
2022-12-01 13:51:50 -08:00 |
tangxifan
|
819b716260
|
[script] debugging
|
2022-12-01 12:30:57 -08:00 |
tangxifan
|
2e585024f7
|
[script] debugging
|
2022-12-01 12:26:30 -08:00 |
tangxifan
|
48a9a97562
|
[script] enabling swig in cmake compilation
|
2022-12-01 12:23:01 -08:00 |
tangxifan
|
0574efa9b3
|
[script] reworking cmakefile for swig integration
|
2022-12-01 12:06:27 -08:00 |
tangxifan
|
10d52f1f8b
|
[engine] add swig interface file
|
2022-12-01 11:54:59 -08:00 |
tangxifan
|
74b32c3a5c
|
[script] enable shared library for openfpga
|
2022-12-01 11:42:25 -08:00 |
tangxifan
|
f1a317b384
|
[engine] format
|
2022-11-24 21:04:04 -08:00 |