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[core] code format

This commit is contained in:
tangxifan 2023-04-19 11:10:42 +08:00
parent a84cc52d7c
commit cb4512b925
3 changed files with 24 additions and 9 deletions
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3
openfpga/src/annotation/annotate_simulation_setting.cpp
View File

@ -211,7 +211,8 @@ int annotate_simulation_setting(
NetPinsMatrix<float> net_delay =
make_net_pins_matrix<float>((const Netlist<>&)cluster_ctx.clb_nlist);
/* Load the net delays */
load_net_delay_from_routing((const Netlist<>&)cluster_ctx.clb_nlist, net_delay, false);
load_net_delay_from_routing((const Netlist<>&)cluster_ctx.clb_nlist,
net_delay, false);
/* Do final timing analysis */
auto analysis_delay_calc = std::make_shared<AnalysisDelayCalculator>(

10
openfpga/src/annotation/openfpga_annotate_routing.cpp
View File

@ -22,12 +22,14 @@ void annotate_vpr_rr_node_nets(const DeviceContext& device_ctx,
const RoutingContext& routing_ctx,
VprRoutingAnnotation& vpr_routing_annotation,
const bool& verbose) {
vtr::vector<RRNodeId, ParentNetId> node2net = annotate_rr_node_nets(
(const Netlist<>&)clustering_ctx.clb_nlist, device_ctx, routing_ctx, verbose, false);
vtr::vector<RRNodeId, ParentNetId> node2net =
annotate_rr_node_nets((const Netlist<>&)clustering_ctx.clb_nlist,
device_ctx, routing_ctx, verbose, false);
for (size_t node_id = 0; node_id < device_ctx.rr_graph.num_nodes();
++node_id) {
vpr_routing_annotation.set_rr_node_net(RRNodeId(node_id),
convert_to_cluster_net_id(node2net[RRNodeId(node_id)]));
vpr_routing_annotation.set_rr_node_net(
RRNodeId(node_id),
convert_to_cluster_net_id(node2net[RRNodeId(node_id)]));
}
VTR_LOG("Loaded node-to-net mapping\n");
}

20
openfpga/src/vpr_wrapper/vpr_main.cpp
View File

@ -118,7 +118,10 @@ static int vpr_standalone(int argc, char** argv) {
/* Read options, architecture, and circuit netlist */
vpr_init(argc, const_cast<const char**>(argv), &Options, &vpr_setup, &Arch);
const Netlist<>& net_list = vpr_setup.RouterOpts.flat_routing ? (const Netlist<>&)g_vpr_ctx.atom().nlist : (const Netlist<>&)g_vpr_ctx.clustering().clb_nlist;
const Netlist<>& net_list =
vpr_setup.RouterOpts.flat_routing
? (const Netlist<>&)g_vpr_ctx.atom().nlist
: (const Netlist<>&)g_vpr_ctx.clustering().clb_nlist;
if (Options.show_version) {
vpr_free_all(net_list, Arch, vpr_setup);
@ -142,14 +145,20 @@ static int vpr_standalone(int argc, char** argv) {
} catch (const tatum::Error& tatum_error) {
VTR_LOG_ERROR("%s\n", format_tatum_error(tatum_error).c_str());
const Netlist<>& net_list = vpr_setup.RouterOpts.flat_routing ? (const Netlist<>&)g_vpr_ctx.atom().nlist : (const Netlist<>&)g_vpr_ctx.clustering().clb_nlist;
const Netlist<>& net_list =
vpr_setup.RouterOpts.flat_routing
? (const Netlist<>&)g_vpr_ctx.atom().nlist
: (const Netlist<>&)g_vpr_ctx.clustering().clb_nlist;
vpr_free_all(net_list, Arch, vpr_setup);
return ERROR_EXIT_CODE;
} catch (const VprError& vpr_error) {
vpr_print_error(vpr_error);
const Netlist<>& net_list = vpr_setup.RouterOpts.flat_routing ? (const Netlist<>&)g_vpr_ctx.atom().nlist : (const Netlist<>&)g_vpr_ctx.clustering().clb_nlist;
const Netlist<>& net_list =
vpr_setup.RouterOpts.flat_routing
? (const Netlist<>&)g_vpr_ctx.atom().nlist
: (const Netlist<>&)g_vpr_ctx.clustering().clb_nlist;
if (vpr_error.type() == VPR_ERROR_INTERRUPTED) {
vpr_free_all(net_list, Arch, vpr_setup);
@ -162,7 +171,10 @@ static int vpr_standalone(int argc, char** argv) {
} catch (const vtr::VtrError& vtr_error) {
VTR_LOG_ERROR("%s:%d %s\n", vtr_error.filename_c_str(), vtr_error.line(),
vtr_error.what());
const Netlist<>& net_list = vpr_setup.RouterOpts.flat_routing ? (const Netlist<>&)g_vpr_ctx.atom().nlist : (const Netlist<>&)g_vpr_ctx.clustering().clb_nlist;
const Netlist<>& net_list =
vpr_setup.RouterOpts.flat_routing
? (const Netlist<>&)g_vpr_ctx.atom().nlist
: (const Netlist<>&)g_vpr_ctx.clustering().clb_nlist;
vpr_free_all(net_list, Arch, vpr_setup);
return ERROR_EXIT_CODE;