AurelienUoU
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ee7b1c9b1d
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Update architecture for tutorial
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2020-01-07 10:08:04 -07:00 |
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AurelienUoU
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90aaed6e1f
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Fix regression test
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2019-08-14 09:10:13 -06:00 |
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AurelienUoU
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40b7f1cc53
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Merge remote-tracking branch 'origin/dev' into heterogeneous
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2019-07-29 11:45:23 -06:00 |
tangxifan
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6e1d49d74e
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start to support direct mapping to MUX2 standard cells
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2019-07-17 07:54:23 -06:00 |
Baudouin Chauviere
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69014704ef
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Explicit verilog final push
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2019-07-16 13:13:30 -06:00 |
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AurelienUoU
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b810b5cab9
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fpga_flow bug fix + upload k8 architecture
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2019-07-16 07:04:45 -06:00 |
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AurelienUoU
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19ccbce9d0
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Rename option to use circuit_model rather than spice_model
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2019-07-12 16:18:28 -06:00 |
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AurelienUoU
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ef600bc63f
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Save workspace
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2019-07-12 15:57:41 -06:00 |
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AurelienUoU
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ad0b4b3acd
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Merge remote-tracking branch 'origin/dev' into documentation
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2019-07-11 10:15:26 -06:00 |
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AurelienUoU
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a47711203c
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Tuto update draft 5
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2019-07-10 14:59:03 -06:00 |
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Baudouin Chauviere
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4ca0967453
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Merge branch 'dev' of https://github.com/LNIS-Projects/OpenFPGA into dev
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2019-07-09 14:35:51 -06:00 |
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Baudouin Chauviere
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792ba23f4f
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Correction pre-merge
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2019-07-09 14:34:34 -06:00 |
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Baudouin Chauviere
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589f58b55e
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Regression test succeeded
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2019-07-09 09:18:06 -06:00 |
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AurelienUoU
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60f7ab0465
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Start heterogeneous dev
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2019-07-02 10:16:10 -06:00 |
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tangxifan
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1332ba62e8
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update tileable rr_graph generator to improve routability and also enable assoicated testing
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2019-06-27 17:52:25 -06:00 |
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tangxifan
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4d3b5f12b4
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fixed bugs for UNIVERSAL and WILTON switch blocks
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2019-06-25 14:15:29 -06:00 |
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AurelienUoU
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c76dbaac33
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Update regression test avoiding overwritting files
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2019-06-14 11:44:44 -06:00 |
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tangxifan
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d737c4ff46
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fix path in regression test! TODO: must keep a duplicated copy for template.xml
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2019-06-07 23:31:42 -06:00 |
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tangxifan
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0f1ed19ad0
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Revert to the use of sprintf instead std::string. Have no idea why string is not working
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2019-06-07 18:54:57 -06:00 |
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AurelienUoU
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fcc10d8acf
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Correct fpga_flow/arch/template files
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2019-06-04 16:45:04 -06:00 |
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AurelienUoU
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a2f6ded2a2
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Add path modification in file changing a keyword into OpenFPGA full path
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2019-06-04 15:21:15 -06:00 |
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AurelienUoU
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ff9b84d800
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Bug fix in Icarus requirement
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2019-05-10 14:07:32 -06:00 |
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tangxifan
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72fbd8d6a8
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update blif reader to identify clock signals
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2018-12-10 13:28:44 -07:00 |
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Baudouin Chauviere
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fe47b3d21f
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Changing arch from memory dec to scff. Get the bitstream from go.sh
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2018-12-06 14:03:17 -07:00 |
Baudouin Chauviere
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9611576d6a
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Update on the examples to respect the new syntax
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2018-11-19 15:50:29 -07:00 |
Aurelien Alacchi
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e0c2fc2c8a
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Documentation_code&example_update
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2018-10-12 15:50:09 -06:00 |
Xifan Tang
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00ecd0bb1d
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Cleanup codes and organization
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2018-09-04 17:31:30 -06:00 |
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Xifan Tang
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158dec405e
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Reorganize the code directory
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2018-07-26 11:28:21 -06:00 |