Board config files, to allow communication with
the builtin USB-JTAG adapter.
Change-Id: I80fb0c36b3cc164940ff266f1eaa287d870da94d
Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
ESP32-C6 and ESP32-H2 are single core riscv targets.
Change-Id: If92429de4fb67a040f303a54177d61b70e1ea281
Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
This commit enhances code reusability, simplifies maintenance, and ensures
consistency across all chip configurations by consolidating commonly used
commands and variables into the common config file.
Change-Id: I825dd4fddb88e5514429d49ab13869ee6b9a28fc
Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
This commit enhances code reusability, simplifies maintenance, and ensures
consistency across all chip configurations by consolidating commonly used
commands and variables into the common config file.
Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: Ie3413d3149388b17bc0199409ce86d3eb7cf5ee2
Board config file for ESP32-S3, to allow communication with
the builtin USB-JTAG adapter.
Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: I1310f5db30f7df38fe9344f7ba2334611b53863e
Reviewed-on: https://review.openocd.org/c/openocd/+/7749
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
This config file enables communication over USB-JTAG with
ESP32-C3, ESP32-S3, ESP32-H2 and ESP32-C6 chips
Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: Iceea26972588d8c4919d1f3248684ece48ca9121
Reviewed-on: https://review.openocd.org/c/openocd/+/7748
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
This commit enhances code reusability, simplifies maintenance, and ensures
consistency across all chip configurations by consolidating commonly used
commands and variables into the common config file.
Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: Ifb0122f3b98a767f27746409499733b70fb7d0e8
Reviewed-on: https://review.openocd.org/c/openocd/+/7747
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
This commit enhances code reusability, simplifies maintenance, and ensures
consistency across all chip configurations by consolidating commonly used
commands and variables into the common config file.
Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: I36c86fe4ebc99928ce48a5bff8cb9580a0fa3ac0
Reviewed-on: https://review.openocd.org/c/openocd/+/7746
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
This commit enhances code reusability, simplifies maintenance, and ensures
consistency across all chip configurations by consolidating commonly used
commands and variables into the common config file.
Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: I9181737d83eeba4e983b6a455b8a1523f2576dd2
Reviewed-on: https://review.openocd.org/c/openocd/+/7745
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Consolidate commonly used commands and variables from
chip config files into functions in esp_common.cfg.
This includes "jtag newtap," "target create,"and "configure -event."
Enhances code reusability and simplifies maintenance.
Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: I9e8bf07a4a15d4544ceb564607dea66837381d70
Reviewed-on: https://review.openocd.org/c/openocd/+/7744
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
The rtos hwthread has been merged in 2019 with commit 85ba2dc4c6
("rtos/hwthread: add hardware-thread pseudo rtos").
During review in patchset 19 the name of the rtos has been changed
from 'hawt' to 'hwthread'.
Some target config file was already merged ready for hwthread, but
keeping the relevant lines commented and still reporting the old
name.
Enable rtos hwtread to the target that were supposed to use it.
Fix the name of the rtos.
Change-Id: I877862dcdba39f26462bb542bac06d1a5f5f222d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7384
Tested-by: jenkins
This patch is picked from the tcl part of OpenOCD-Nuvoton's commit
("flash: supported Nuvoton M4 series. jtag: Used HW reset instead of
auto reset. tcl: added a configuration file for Nuvoton M4 series.") [1]
to support the communication with Nuvoton's Cortex-M4 chips: M541 &
NUC442/472 series.
This patch has been tested with Nuvoton's NuTiny-SDK-NUC472 development
board [2].
The code comes from the commit basically. Jian-Hong Pan tweaked for the
compatibility with current OpenOCD. So, leave the author as Zale Yu.
[1]: https://github.com/OpenNuvoton/OpenOCD-Nuvoton/commit/c2d5b8bfc705
[2]: https://www.nuvoton.com/export/resource-files/UM_NuTiny-SDK-
NUC472_EN_Rev1.02.pdf
Signed-off-by: Zale Yu <cyyu@nuvoton.com>
Signed-off-by: Jian-Hong Pan <chienhung.pan@gmail.com>
Change-Id: I27ac58dd1c98a76e791a4f1117c31060cf5522e8
Reviewed-on: https://review.openocd.org/c/openocd/+/7330
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
rp2040-core0.cfg configuration file was intended for a special adapter
which selects a SWD multidrop target on its own. This means
that rp2040-core0.cfg is totally unusable with a standard SWD
adapter. The file was marked as deprecated in 0.12 release.
The reworked rp2040.cfg can be restricted to use just one core:
openocd ... -c 'set USE_CORE 0' -f target/rp2040.cfg
Remove the obsoleted config.
Change-Id: Id886471622bb4a8cb83f5c4c3660657407aaaf74
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7326
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Add the variable selected configuration for SMP debug with rtos hwthread.
Use SMP by default.
Change-Id: I1c37d91688a3ab58d65c15686737892965711adc
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7242
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
The target nds32 and its companion adapter aice have not received
any real improvement since 2013.
It has been hard to keep them aligned during the evolution of
OpenOCD code, with no way for maintainers to really check if they
are still working.
No real documentation is present for them in OpenOCD.
The nds32 code triggers ~50 errors/warnings with scan-build.
The arch nds32 has been dropped from Linux kernel v5.18-rc1.
For all the reasons above, this code has been deprecated with
commit 2e5df83de7 ("nds32: deprecate it, together with aice
adapter driver") and tagged to be dropped before v0.13.0.
Let it r.i.p. in OpenOCD git history.
While there, drop from checkpatch list the camelcase symbols that
where only used in this code.
Change-Id: Ide52a217f2228e9da2f1cc5036c48f3536f26952
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7382
Tested-by: jenkins
The speed coefficient for Raspberry Pi 2 was probably calibrated
for a scaled down clock frequency.
To prevent JTAG/SWD overclocking, use the value corresponding
to the 'official' maximum CPU clock.
Change-Id: Iaff58b092198dce6d6552c9d31d6a3ba4aaaa2d5
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7305
Tested-by: jenkins
Reviewed-by: Jonathan Bell <jonathan@raspberrypi.com>
The existing rp2040-core0.cfg configuration file was intended
for a special adapter which selects a SWD multidrop target on its own.
This means that rp2040-core0.cfg is totally unusable with a standard SWD
adapter.
To fix the problem, mark rp2040-core0.cfg as deprecated and
add rp2040.cfg, a basic config file with multidrop target selection.
Change-Id: I5194e42f529a2d9645481424b7c66ab61efa44ee
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7275
Tested-by: jenkins
Reviewed-by: Jonathan Bell <jonathan@raspberrypi.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
instrument "target/stm32x5x_common.cfg" used by both STM32L5x/U5x
to support HLA adapters like "interface/stlink.cfg" in non-secure mode
if the device switches to secure mode, the debug session will be
stopped immediately (with an explanatory message).
Change-Id: I645fdd55e3448ef82d0ddcc396f42fd7b2f39ac3
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reported-by: Patrik Bachan <diggit@users.sourceforge.net>
Fixes: https://sourceforge.net/p/openocd/tickets/317/
Reviewed-on: https://review.openocd.org/c/openocd/+/6546
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Some config changes required to run ESP32-S3 with full feature set
Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: I38022bb5ff5830e1cf9d11d6fe795ea99d91e9db
Reviewed-on: https://review.openocd.org/c/openocd/+/7254
Tested-by: jenkins
Reviewed-by: Ian Thompson <ianst@cadence.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Some config changes required to run ESP32-S2 with full feature set
Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: Ie0a742442254ec6e95d4e05be40213b079a94dab
Reviewed-on: https://review.openocd.org/c/openocd/+/7253
Tested-by: jenkins
Reviewed-by: Ian Thompson <ianst@cadence.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Some config changes required to run ESP32 with full feature set
Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: I484324f8497ec7934bb73164c638fc5f6460fcc4
Reviewed-on: https://review.openocd.org/c/openocd/+/7252
Tested-by: jenkins
Reviewed-by: Ian Thompson <ianst@cadence.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
The work area should be backed up.
The flash probe runs an algorithm on the target CPU.
The flash is probed during gdb connect if gdb_memory_map is enabled
(is enabled by default).
Without backup the target memory gets corrupted on gdb connect.
Change-Id: I3344b9dc6cbf904d49f3b05ab104b541d1d63422
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7257
Tested-by: jenkins
Reviewed-by: Jonathan Bell <jonathan@raspberrypi.com>
Since all the device definition when accessing device from jtag is also
valid when accessing from swd, lets make sure the configuration can
handle the same.
Signed-off-by: Nishanth Menon <nm@ti.com>
Change-Id: I5af071137fd8c3b52cc4ef72401f8eba952f9cad
Reviewed-on: https://review.openocd.org/c/openocd/+/7090
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
The STM32L5 and U5 devices have DBGMCU_CR trace related bits changed
wrt other STM32 devices.
Fix the setting in configuration script.
Change-Id: I0bbc48e7b1290b603c6966cf5ddd42df389e6ede
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7117
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Use the new "adapter gpio" commands to configure the GPIOs used by the
bcm2835gpio driver. The driver supports only 1 chip (gpiochip0).
The reset function now honours the srst_open_drain and trst_open_drain
options.
Signed-off-by: Steve Marple <stevemarple@googlemail.com>
Change-Id: I5b6c68b16362000cf5141a83394549d2bf3af108
Reviewed-on: https://review.openocd.org/c/openocd/+/7123
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Still some config file uses deprecated commands.
Replace them with the new commands.
Change-Id: I6ccbfb832e0ad2012e9af160bd2d92ad104af2bb
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7181
Tested-by: jenkins
- Config files for DAP/JTAG and DAP/SWD systems
- Xtensa core config definitions for NXP RT685 with Xtensa HiFi DSP
Signed-off-by: Ian Thompson <ianst@cadence.com>
Change-Id: I9c3280052073d86e09c7553de661eb8662a95c4a
Reviewed-on: https://review.openocd.org/c/openocd/+/7145
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
While reviewing on gerrit the change
https://review.openocd.org/6932/
it get clear that the missing documentation on stm32f4x's code
was triggering errors in the new change.
OpenOCD is currently unable to read traces, but these can be
hopefully be read with some other tool.
Document the settings for enabling trace on stm32[fl]4x.
Change-Id: Ibae77a53de16375d3d500e728678740095547009
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6945
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
With commit dc7b32ea4a ("armv7m_trace: get rid of the old tpiu
code") the target's event "trace-config" has been deprecated.
Create the TPIU device.
Replace the target's event "trace-config" with tpiu's event
"pre-enable" in the STM32 devices that require enabling the trace
clock _before_ programming the TPIU.
Make the script multi-instance-able in case it's used for JTAG
chained devices.
Uniform the code in STM32F4x with the other scripts.
Remove the empty event from STM32WLx.
Change-Id: Ifda219c3c5f37e03072a88168611cf505eb630b7
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6681
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Generic Xtensa LX support extends the original Espressif/Xtensa
patch-set to support arbitrary Xtensa configurations, as defined in
a core-specific .cfg file. Not yet fully-featured. Additional
functionality to be added:
- Xtensa NX support
- DAP/SWD support
- File-IO support
- Generic Xtensa multi-core support
Valgrind-clean, no new Clang analyzer warnings
Signed-off-by: Ian Thompson <ianst@cadence.com>
Change-Id: I08e7bf8fa57c25b5d0cb75a1aa7a2ac13a380c52
Reviewed-on: https://review.openocd.org/c/openocd/+/7055
Tested-by: jenkins
Reviewed-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Use the new "adapter gpio" commands to configure the GPIOs used by the
linuxgpiod driver.
Adds support for drive mode and resistor pull options on all signals.
Change-Id: Ic90cb4f06db82435294228b6793330107a9f3606
Signed-off-by: Steve Marple <stevemarple@googlemail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7048
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Use the new "adapter gpio" commands to configure the GPIOs used by the
am335xgpio driver. The AM335x has 4 GPIO 'chips' (chip number 0-3
inclusive), with each one providing 32 GPIOs (gpio_num 0-31 inclusive).
Change-Id: I7c63c0e4763657ea51790c43fc40d32b7c3580bb
Signed-off-by: Steve Marple <stevemarple@googlemail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6984
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tim Newsome
Erhan Kurubas
Antonio Borneo
Zale Yu
Tomas Vanek
Kyle Schwarz
Rocco Marco Guglielmi
George Voicu
Tarek BOCHKATI
Nishanth Menon
mrv96
Paul Fertser
Steve Marple
Ian Thompson
Toms Stūrmanis
Jae Hyun Yoo