Commit Graph

6695 Commits

Author SHA1 Message Date
Antonio Borneo f275ae586b jtag: print an errmsg on using jtag API for non jtag transport
After the cleanup of swd and hla, there should be no more calls
to jtag_execute_queue() or to queue jtag commands if current
transport is not jtag. Thus we can start removing the jtag
specific code from adapters that do not support jtag.

To prevent some remaining call to jtag_execute_queue() to crash
openocd, verify the transport, print an error message if the
transport is not jtag, call the adapter's jtag_execute_queue()
only if it exist.
To identify code that still add commands in the jtag queue even
if transport is not jtag, print an error message in the function
jtag_queue_command(). For the moment, still queue the message,
even if will cause a memory leak if there is no following call
to jtag_execute_queue(); the target is to identify the issue and
cleanup the code, thus solving also the leak.

Change-Id: I8fc85f754aa057aad1df05ff0448c8619897da23
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4897
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-14 11:38:23 +00:00
Antonio Borneo 0f24549ce9 hla: use the new system_reset API
HLA uses its own internal driver's API to control the adapter's
system reset, but at the same time it calls jtag_add_reset() to
avoid breaking the internal logic of OpenOCD. This implicitly
forces HLA to rely on jtag queue mechanism, even if HLA has no
link with JTAG state machine. It requires HLA to implement an
empty execute_queue() to comply with the JTAG queue.

Modify the HLA framework and the HLA targets to use the new
adapter API for system_reset and decouple HLA from JTAG queue.
Rename the HLA static functions adapter_assert_reset() and
adapter_deassert_reset() to avoid overlap with the global
functions with same name.
While there, fix a minor typo in a comment s/incase/in case/.

Do not remove from HLA the JTAG specific API execute_queue(),
even if not required anymore, because OpenOCD code still has
calls to jtag_execute_queue() in case of non JTAG transport.

Change-Id: I0e65e3e557bd665bd3d3aeaa84ea609b55a05e48
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4896
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-14 11:37:34 +00:00
Antonio Borneo 9daec098a9 bitbang: jtag-only drivers: switch to new reset API
Remove the JTAG_RESET command from the bitbang execute queue now
that all bitbang drivers have moved away from old reset method.
Remove also the internal reset API in struct bitbang_interface.

Tested parport only.

Change-Id: I12b157ef442f4c9912406b19b7a4d32ba6ec0b53
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5300
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-14 11:16:24 +00:00
Antonio Borneo 8850eb8f2c swd: get rid of jtag queue to assert/deassert srst
The transport SWD uses the JTAG queue to assert/deassert the
system reset srst. This is the major inconsistency that has to be
removed to properly split JTAG and SWD.

Introduce a new driver API, reset(), to controls both the signals
trst and srst in the driver, skipping the JTAG queue. Put the new
API in struct jtag_interface, even if in this patch it's used for
SWD only; the goal is to get it reused by the other transports.

Add the implementation of the API in all the drivers that
implement SWD. Such implementation is almost the same of the old
code in JTAG queue.

Create a wrapper adapter_system_reset() to use the new API and
remove the SWD specific swd_add_reset(). In the wrapper replace
jtag_add_sleep() with jtag_sleep(), because the former uses the
JTAG queue too.
Rename the old jtag_add_reset() as legacy_jtag_add_reset() with
the target to remove it when all drivers would be ported to the
new reset API. Create a new jtag_add_reset() that calls the
legacy function for drivers still on the old reset API.

Use the new API also on JTAG transport for the drivers that can
support both SWD and JTAG.

For the moment, do not modify the implementation of JTAG-only
drivers, which will continue using the usual method. This should
be cleaned-up in future commits.

Change-Id: I32331c88313f6059b25e12c6bb0156aebc1c074f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4895
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-14 11:15:12 +00:00
Marek Vasut db23c13d42 flash/nor: Factor out CFI memory read/write functions
Create separate memory read/write functions which facilitate access
to the CFI NOR, so that they can be replaced by controller-specific
functions if necessary. This would become necessary when implementing
support for e.g. HyperFlash controllers, which do not directly map
the HyperFlash into the address space.

Change-Id: I1bba1edfd397cb37bfedb43efe2dd03feb26a375
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/5145
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2020-01-05 14:29:57 +00:00
Marek Vasut 790bd27181 flash/nor: Factor out cfi_spansion_unlock_seq()
Factor out the spansion unlock sequence to deduplicate the code.

Change-Id: Id78522e9a2f0e701870ef816772289d08257476a
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/5144
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2020-01-05 14:26:54 +00:00
Keir Fraser 9f1529da4f flash/nor/stm32f2x: Support value line chips with trimmed flash
The current code assumes an STM32's flash bank is laid-out in either of
two configurations:
- 4 x 16kB + 1 x 64kB + n x 128kB
- 4 x 32kB + 1 x 128kB + n x 256kB

This is quite ad-hoc but works fine in practice, as long as there are at
least 5 sectors (if n=0). Unfortunately, some newer STM32s are shipping
with only 64 kB of flash (4 x 16kB sectors).

This patch still assumes the same sector layout, but only keeps adding
sectors to the bank if the bank's capacity has not been reached. This
prevents openocd from crashing on some newer STM32s.

Change-Id: If00e5d7a328d11b399babc0bb2111e3ad8a3217e
Signed-off-by: Romain Goyet <romain.goyet@numworks.com>
Signed-off-by: Keir Fraser <keir.xen@gmail.com>
Reviewed-on: http://openocd.zylin.com/4926
Tested-by: jenkins
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-03 10:28:45 +00:00
Antonio Borneo be2d25efcc arm_adi_v5: add API send_sequence() and use it
The method to send an arbitrary sequence to DAP depends on the
transport and is thus different on JTAG and SWD. This is already
coded in dap_to_jtag() and dap_to_swd().

Add a new API send_sequence() in struct dap_ops.
Add the implementations of send_sequence() in adi_v5_jtag.c and
adi_v5_swd.c
Rewrite dap_to_jtag() and dap_to_swd() using the new API.
Move the enum swd_special_seq in arm_adi_v5.h to solve a circular
dependencies among swd.h and arm_adi_v5.h

Change-Id: I9db13a00f129761eab283783c094cfff2dd92610
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4902
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-02 21:24:54 +00:00
Antonio Borneo c07b774e8f jtag: replace command "jtag_reset" with "adapter [de]assert"
Replace the JTAG transport specific command with a more generic
one. Deprecate "jtag_reset" and update the documentation.
While there, fix an error in the documentation, where the command
"jtag_reset" was used in place of command "reset_config".

Change-Id: I41a988d37ce69f7b35a960cbaf5306aab0299b99
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5286
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-02 21:24:38 +00:00
Antonio Borneo fafe6dfc9c adapter: add command "adapter [de]assert srst|trst [[de]assert srst|trst]"
Inspired from http://openocd.zylin.com/#/c/3720/1

Add commands to control the adapter's signals srst and trst.
Add macros for the flag's values assert/deassert to make clear what
they mean and to propose a uniform set of values across the code.

Change-Id: Ia8b13f4ded892942916cad7bda49540a896e7218
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5277
Tested-by: jenkins
2020-01-02 21:24:30 +00:00
Jan Matyas deff24afa1 jtag_vpi: multiple improvements
- Fix: Proper handling of read_socket() and write_socket()
in case of "partial" read/write.

- Added low-level JTAG IO debug capability (_DEBUG_JTAG_IO_)

- Zero-fill packet buffers, avoid sending pieces of uninitialized
memory over the network (memset struct vpi_cmd)

- Use close_socket() instead of close() - needed for Win32

- Fixed usage messages of jtag_vpi_command_handlers

Change-Id: I8bd19bc5c9512fe8e798600212e8a95213f50f5b
Signed-off-by: Jan Matyas <matyas@codasip.com>
Reviewed-on: http://openocd.zylin.com/5177
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-02 21:22:33 +00:00
Oleksandr Redchuk 7f5caa24e3 flash/nor/stm32f1x: fix options reading from locked chip
In commit cea40152f8 option bytes
reading was changed to direct access to option bytes area.
While there are no problems with stm32f0xx and stm32f3xx chips,
option block (0x1ffff800..0x1ffff80F) is unreadable from locked
stm32f10x chips.
As a result, stm32f1x unlock command writes dirty values to user
options, user data and write protection bits.

Option bytes reading reverted from direct access to option bytes area
to reading currently loaded bytes from  FLASH_OBR/FLASH_WRPR registers.

Tested on stm32f100, stm32f103, stm32f107 as well as on stm32f030 and
stm32f303.

Change-Id: Iad476351ffdaca5ace12e02272dacea7f3d08f52
Signed-off-by: Oleksandr Redchuk <real@real.kiev.ua>
Reviewed-on: http://openocd.zylin.com/4940
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-02 21:22:07 +00:00
Rahul Masurkar 6568d29cc1 rtos/FreeRTOS: Fix FreeRTOS thread list reading
Change-Id: I749ae94ec7279907b1905c02ecc1e9661f43ef70
Signed-off-by: Rahul Masurkar <rahulgm@marvell.com>
Reviewed-on: http://openocd.zylin.com/5273
Tested-by: jenkins
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-02 21:20:29 +00:00
Tomas Vanek bb1c7ae4ae flash/nor/kinetis: fix clang static analyzer warnings
Use assert to remove "Dereference of null pointer" warnings.

Change-Id: Ie204c234a71758e6470351e1d9f22da3dd887f56
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5357
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-01-02 21:20:06 +00:00
Tarek BOCHKATI 0750a7c085 target/arm_cti: add new 'ack' and 'channel' commands
these commands have been introduced to ease the manipulation of CTI trough
script files, these commands are:
 - $cti_name ack $event : to acknowledge a CTI event
 - $cti_name channel $channel_number $operation: to perform an operation
    on a specific channel, the possible operations are:
    gate, ungate, set, clear and pulse

Change-Id: I35463867a3c85072f3776c3aeb1e5788953ec435
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5315
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2020-01-02 21:19:27 +00:00
Tarek BOCHKATI bc0667c237 flash/nor/stm32h7: (minor) use proper variable names and enhance logging
-fsize_base should be fsize_addr as it is the address of FLASH_SIZE register
-flash_base should be flash_regs_base to avoid confusion with flash block start
-add LOG_ERROR to functions stm32x_[read|write]_flash_reg(...)

Change-Id: I86f035314bcd616fc0bdf445692d945a85c15481
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5362
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-02 21:18:22 +00:00
Marc Schink 2dc88e1479 target/armv7m_trace: Improve SWO frequency auto-detection
The SWO frequency auto-detection with J-Link adapters does not work
properly in the current implementation. This is because the trace layer
has only information about the highest possible SWO frequency supported
by the adapter. With that the trace layer calculates the SWO prescaler
which usually leads to a frequency deviation greater than what is
permitted by J-Link adapters.

Move the calculation of the SWO prescaler from the trace layer into the
trace configuration of the adapter to overcome this problem.
The adapter has the necessary information to choose a suitable SWO
frequency and calculate the corresponding prescaler that complies with
the maximum allowed frequency deviation.

Tested with:
  - STM32L152RC Discovery Kit (ST-Link)
  - EFM32GG-STK3700 (J-Link)

Change-Id: I38ff2b89d32f0a92c597989b590afe5c75cf4902
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3903
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2019-12-21 19:25:32 +00:00
Antonio Borneo 90bd7d1482 helper/command: remove unused field in struct command_registration
The field jim_handler_data in struct command_registration is never
assigned, thus has always value NULL. It was added in commit
17a9dea53a ("add jim_handler to command_registration") on Nov 23
2009, together with the homonym field jim_handler_data in struct
command, but never used since then.
Only the field jim_handler_data in struct command is used.

Remove the field from struct command_registration and use NULL
where it was referenced (or remove the assignment if the recipient
is already zero, e.g. allocated with calloc()).

Removing the field decreases the total size of OpenOCD binary by
only 4944 byte on a 64 bit x86. Not a significant improvement from
this point of view.

Change-Id: I9f1d281e3de6b2eb398e2d883c5e9ff92628aecd
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5225
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-12-19 20:43:08 +00:00
Antonio Borneo e8d4074cf8 target/armv4_5: use c99 array designator to init arm_core_regs[]
During code analysis and development, counting again and again the
lines to find the index of the register is a boring error-prone
brain-damaging activity.
Use the c99 syntax and add once forever the array designators to
specify the index values.
The code behavior is not changed.

Change-Id: I2c70f70794475679efb91a8dfadc00f50715bd3f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5256
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-12-19 20:42:41 +00:00
Antonio Borneo 49d71d06d1 sysfsgpio: give time to udev to change gpio permission
When a gpio is exported by writing in /sys/class/gpio/export, the
corresponding gpio control files appear immediately in sysfs but
with default access permission for root user only. The daemon udev
requires some time to get notified of the new files before it can
change the permissions to allow access to unprivileged users.
Due to this race condition, sysfsgpio can fail with EACCES error
if OpenOCD is executed by any unprivileged user.

Give 0.5 seconds to udev to identify the new files and change the
permission.

Tested with udev rules:
	SUBSYSTEM=="gpio*", PROGRAM="/bin/sh -c 'find -L /sys/class/gpio/ -maxdepth 2 -exec chown root:uucp {} \; -exec chmod g=u {} \; || true'"

Change-Id: I1316c66ff103ffe23e5e4720f33372dc272a3766
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5302
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-12-19 20:42:01 +00:00
Antonio Borneo 964c4db9ce gdb_server: fix extended_protocol for multi-target
The flag extended_protocol is currently a single static variable
thus, in case of multiple targets, it is shared among all the gdb
connections. This is an issue if the gdb connections are not all
using extended protocol, but also when one connection get closed
because the code sets the flag to zero impacting the other
connections still open.

Move the flag extended_protocol in the per-connection struct
gdb_connection.

Change-Id: I19d565f925df6a31767fd8d392242f60867109f2
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5310
Tested-by: jenkins
Reviewed-by: Moritz Fischer <moritzf@google.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-12-19 20:41:18 +00:00
Antonio Borneo f476c9eec4 gdb_server: fix string length with semihosting_fileio
The GDB file-I/O remote protocol extension, used for implementing
the semihosting file I/O, requires the length of strings to
include the trailing zero character, as explicitly stated inside a
comment in GDB source code [1]:
	/* 1. Parameter: Ptr to pathname / length incl. trailing zero.  */

ARM specification for semihosting [2] requires the string length
to not include the trailing zero character, e.g. in SYS_OPEN
specifications:
	"field 3: An integer that gives the length of the string
	 pointed to by field 1. The length does not include the
	 terminating null character that must be present."

The mismatch above requires OpenOCD to add "one" to the string
length before passing it to GDB. Such conversion is missing
either in the generic semihosting provider of the data, the
function semihosting_common(), and in the consumer of the data,
the gdb_server function gdb_fileio_reply().
The conversion is already implemented in the target specific
function nds32_get_gdb_fileio_info(), but it's not the preferred
place for such GDB specific requirement.

This issue affects the semihosting calls "open", "unlink",
"rename" and "system".

Remove the "+1" conversion from nds32_get_gdb_fileio_info().
Add the "+1" conversion in gdb_fileio_reply().

[1] http://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;f=gdb/remote-fileio.c;h=11c141e42c4d#l381
[2] "Semihosting for AArch32 and AArch64, Release 2.0"
    https://static.docs.arm.com/100863/0200/semihosting.pdf

Change-Id: I35461bcb30f734fe2d51f7f0d418e3d04b4af506
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5322
Tested-by: jenkins
Reviewed-by: Steven Stallion <sstallion@gmail.com>
Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-12-19 20:40:55 +00:00
Tomas Vanek 104a5cbef8 flash/nor/stm32f2x: fix clang static analyzer warning
Using a signed variable as a parameter of FLASH_SNB() macro
generated "warning: The result of the left shift is undefined
because the left operand is negative"

Change-Id: I8b3fe840f9308962460906097df6ddd848c07b25
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5356
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-12-17 15:35:24 +00:00
Jan Matyas 881484708d jtag_vpi: ensured constant packet size & endianness
Made sure that size and endianness of jtag_vpi structures sent
over the network is the same, regardless of the platform.

Little endian chosen to maintain as much compatibility
with existing OpenOCD builds as possible.

Matching change in the original jtag_vpi server:
https://github.com/fjullien/jtag_vpi/pull/4

Change-Id: Ib839fea9bb2d5190b5643c970b89333b286dce71
Signed-off-by: Jan Matyas <matyas@codasip.com>
Reviewed-on: http://openocd.zylin.com/5152
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
2019-12-16 23:27:32 +00:00
Tomas Vanek 22b4abc46c flash/nor/nrf5: remove check for protected sector
The new "Access control list" flash protection scheme used in nRF52840
is not yet supported. Do not prevent sector erase if protection
state is unknown.

Change-Id: Iae9a869a54ffbdc888fb3ec478dafb5c942d9ea0
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5348
Tested-by: jenkins
2019-12-12 14:31:59 +00:00
Jimmy 0f12d792ed server/tcl_server.c: Fix buffer overrun
The input buffer size is checked only after writing past its end.

Change-Id: I6a9651c5b7d82efe338468d67bf6caca41004b01
Signed-off-by: Jimmy <nhminus@gmail.com>
Reviewed-on: http://openocd.zylin.com/5352
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-12-12 14:31:42 +00:00
Paul Fertser 1e427fd580 server: gdb_server: fix memory map generation on a 32-bit BE host
Due to lack of printf format check wrong specifier was used and it
actually broke operation on a 32-bit BE host.

So fix this and add the necessary function attributes so that the bugs
like that can be uncovered automaticaly.

Reported and pinpointed by Karl Palsson on IRC.

Change-Id: I254ec28fcd9bb30594d607f74a6dba5456c2c7a1
Tested-by: Karl Palsson <karlp@tweak.net.au>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/5342
Tested-by: jenkins
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-12-10 10:43:03 +00:00
Tarek BOCHKATI 678fb4f60b target/stm32h7x: add support of dual core variant of STM32H7
STM32H7x7 and STM32H7x5 devices contains two cores : CM7 + CM4
The second core creation is only done when
  * DUAL_CORE variable is set to true
  * non HLA interface is used

A second check for the second core existence is done in cpu1 examine-end
Once the second core is detected it gets examined.

Furthermore, the script provides a configurable CTI usage in order to halt
the cores simultaneously.

Tested on Rev X and V devices.

PS: the indentation was a mix of spaces and tabs, all changed to tabs.

Change-Id: Iad9c30826965ddb9be5dee628bc2e63f953bbcb8
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5130
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-12-07 13:07:00 +00:00
Peter Mamonov 80f1a92bd7 mips64: Add generic mips64 target support
Change-Id: I2bdd2573f23e65652686d18031698f423eec77c0
Signed-off-by: Konstantin Kostyukhin <kost@niisi.msk.ru>
Signed-off-by: Aleksey Kuleshov <rndfax@yandex.ru>
Signed-off-by: Peter Mamonov <pmamonov@gmail.com>
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
CC: Dongxue Zhang <elta.era@gmail.com>
CC: Paul Fertser <fercerpav@gmail.com>
CC: Salvador Arroyo <sarroyofdez@yahoo.es>
CC: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/2322
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2019-11-28 19:49:10 +00:00
Peter Mamonov 1fbe8450a9 mips: Add MIPS64 support
The patch adds support for processors implementing MIPS64 instruction set.

Change-Id: I79a983dfdead81553457a0f3e9e739a9785afaac
Signed-off-by: Konstantin Kostyukhin <kost@niisi.msk.ru>
Signed-off-by: Andrey Sidorov <anysidorov@gmail.com>
Signed-off-by: Aleksey Kuleshov <rndfax@yandex.ru>
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Peter Mamonov <pmamonov@gmail.com>
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
CC: Dongxue Zhang <elta.era@gmail.com>
CC: Paul Fertser <fercerpav@gmail.com>
CC: Salvador Arroyo <sarroyofdez@yahoo.es>
CC: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/2321
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2019-11-28 16:59:15 +00:00
Tarek BOCHKATI 9c196b0b2b flash/nor/stm32h7x: remove options cache and some driver enhancements
functions managing option bytes cache (stm32x_read/write_options)
have bee removed, and a new functions to modify a single option byte
have been introduced (stm32x_write/modify_option).

by the way, some helpers have been introduced to access flash registers:
  - stm32x_read_flash_reg(bank, offset, *value): int
  - stm32x_write_flash_reg(bank, offset, value): int

and a new commands to read and write a single flash option register:
  - stm32h7x option_read <bank> <option_reg offset>
  - stm32h7x option_write <bank> <option_reg offset> <value> [mask]

also lock and unlock handlers' have been reduced by using the same routine
(stm32x_set_rdp) and have been optimized to not write options unless
there is a change in RDP level.

finally, several functions have been fixed to lock flash / options in case
of failure.

Change-Id: I75057949ab9f5b4e0f602bafb76f9f80d53a522b
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5293
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-11-27 06:16:51 +00:00
Tarek BOCHKATI 8d8c6df557 flash/nor/stm32h7x: fix option bytes handling to work with both banks
To achieve that we need to avoid using FLASH_REG_BASE_B0, and use
bank registers instead:
   For dual bank devices, each option register is mapped in 2 addresses
   at the same offset from flash_bank_reg_base.
   This is true for OPTCR, OPTKEYR, OPTSR_CUR/PRG, OPTCCR according to
   RM0433 Rev6 (refer to section 3.9: FLASH registers)

In stm32x_write_options, according to RM0433 Rev6, after OBL launch we
should wait for OPTSR_CUR.BSY bit instead of FLASH_SR.QW

Change-Id: Ie24a91f069d03c9233797390fc2e925c737dad90
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5291
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-11-27 06:16:40 +00:00
Tarek BOCHKATI 1b276c0ad5 flash/nor/stm32h7x: remove stm32x_options.protection2
Each bank had to store its options only, there is no need for bank1
to sneak into bank2 options.
Furthermore, some variants do not have a second bank.

Change-Id: I9229eb8ab4b5860ba2b0c5dbe626a54a84bca4d6
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5290
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-11-27 06:16:28 +00:00
Tomas Vanek 21bc29d1d6 flash/nor/nrf5: fix allocation of driver_priv and sector array
Drop static pointer to allocated struct nrf5_info, iterate over
the flash bank list to find previously allocated nrf5 instances.
nrf5 is swd only device, so static allocation makes no harm,
but we should avoid copying the wrong code to other flash drivers.

Free sector array before allocating it to avoid memory leak on
re-probing device.

Change-Id: I781d8f4418a91c043f2393e5ecc5278fc6df3566
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4910
Tested-by: jenkins
2019-11-26 07:20:53 +00:00
Tomas Vanek d8288a22c1 flash/nor/nrf5: show RAM size on old nRF51 devices (rev 1, 2)
Change-Id: I2452c084b9bd9e401bd49e15791428a53df1cd1d
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4868
Tested-by: jenkins
2019-11-26 07:20:41 +00:00
Tomas Vanek e2ca8914f2 flash/nor/nrf5: do not check FICR PPFC on nRF52
Change-Id: I6beee9b85a542040f2495513b5ba51bd8e1389db
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4867
Tested-by: jenkins
2019-11-26 07:20:31 +00:00
Tomas Vanek 882df85ec1 flash/nor/nrf5: rename registers by nRF series
Change-Id: I70af671c52665b27a28508e06e7d3e5e40a621f7
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4866
Tested-by: jenkins
2019-11-26 07:20:05 +00:00
Tomas Vanek e3fb76374c flash/nor/nrf5: refactor sector allocation to use alloc_block_array()
Change-Id: Ied8ea917cec492fc6bb8836a92d8c4ceaf3b499b
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4865
Tested-by: jenkins
2019-11-26 07:19:59 +00:00
Tomas Vanek b2dbaf9e15 flash/nor/nrf5: implement BPROT protection check for nRF52810,832
Also refuse 'flash protect' on any nRF52.
Fail protection check on nRF52840 until ACL protection is implemented.

Change-Id: I84fcf117427e4894147c3ad92e2a3597566b4fcf
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4864
Tested-by: jenkins
2019-11-26 07:19:50 +00:00
Tomas Vanek 5da746fa09 flash/nor/nrf5: detect newer devices without HWID table
nrf5 flash driver detected devices by looking up the HWID in the table
of known devices. Unfortunately chips are produced with many different
HWIDs for each type.

All nRF52 devices have FICR INFO field suitable for device identification
without need of HWID lookup.
Some newer nRF51 devices have FICR INFO too although undocumented.
Use this information to identify the device.

nrf5_info() is reworked to show just concise info.
Decoding FICR and UICR registers was moved from nrf5_info()
to a new command 'nrf5 info' without functional changes.

The flash bank for UICR page has the same size as program flash sector.

Change-Id: I900095b9ae23ee995f8e2bef8539b75d00300da5
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4848
Tested-by: jenkins
2019-11-26 07:19:43 +00:00
Tomas Vanek 006d8e5444 flash/nor/nrf5: remove useless page padding and UICR autoerase
nRF5 flash controller can write a word at a time. Ask flash
infrastructure to handle alignment and padding.

Fix mixing of offset and address in nrf5_ll_flash_write()
- the original code worked just because NRF5_FLASH_BASE is 0

Change-Id: Ibe8bdf899a1764cf4117b2deda1a4618eeb16697
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4819
Tested-by: jenkins
2019-11-26 07:19:25 +00:00
Antonio Borneo be36573073 helper: skip including sys/sysctl.h on Linux
Starting from glibc 2.30, the header file sys/sysctl.h gets
deprecated on Linux, after the commit 744e82963716 ("Linux:
Deprecate <sys/sysctl.h> and sysctl")
	https://sourceware.org/git/?p=glibc.git;a=commitdiff;h=744e82963716

The associated NEWS reports
	The Linux-specific <sys/sysctl.h> header and the sysctl
	function have been deprecated and will be removed from a
	future version of glibc.

Latest automake 1.16.1 still does not handle this case.
Current OpenOCD build fails with warning and requires configure
with "--disable-werror" to build.

Prevent including sys/sysctl.h on Linux build.

Change-Id: I5310976573352a96e5aef123352f73475f0c35fe
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5317
Tested-by: jenkins
Reviewed-by: Moritz Fischer <moritz.fischer.private@gmail.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2019-11-23 22:47:33 +00:00
Andreas Fritiofson 6d54d90541 CVE-2018-5704: Prevent some forms of Cross Protocol Scripting attacks
OpenOCD can be targeted by a Cross Protocol Scripting attack from
a web browser running malicious code, such as the following PoC:

var x = new XMLHttpRequest();
x.open("POST", "http://127.0.0.1:4444", true);
x.send("exec xcalc\r\n");

This mitigation should provide some protection from browser-based
attacks and is based on the corresponding fix in Redis:

8075572207/src/networking.c (L1758)

Change-Id: Ia96ebe19b74b5805dc228bf7364c7971a90a4581
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reported-by: Josef Gajdusek <atx@atx.name>
Reviewed-on: http://openocd.zylin.com/4335
Tested-by: jenkins
Reviewed-by: Jonathan McDowell <noodles-openocd@earth.li>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2019-11-22 18:25:34 +00:00
Ake Rehnman 9de7d9c81d STM8 Target relicensing to GPLv2 and later
Change-Id: I21126945c0475399aaf12239b8972fde5fddd845
Signed-off-by: Ake Rehnman <ake.rehnman@gmail.com>
Reviewed-on: http://openocd.zylin.com/5331
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2019-11-07 08:21:40 +00:00
Alexandru Gagniuc 4333339680 jtag: usb_blaster: Add missing 'default' to switch statement
If a new JTAG command is added, then GCC will complain that
enumeration value not handled in switch. This is the only driver not
to have a default case, so add it.

Change-Id: Icb838087bb7525d057a911bd256300e256da1668
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://openocd.zylin.com/5333
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-11-07 08:21:19 +00:00
Alexandru Gagniuc 4f779a88db jtag: jtag_vpi: Add missing 'default' to switch statement
If a new JTAG command is added, then GCC will complain that
enumeration value not handled in switch. Make this consistent with
other drivers, and add a 'default' case.

Change-Id: I66d6d0db3fcae93ea246f2d4882ffff5dec14693
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://openocd.zylin.com/5340
Tested-by: jenkins
Reviewed-by: Jan Matyas <matyas@codasip.com>
Reviewed-by: Franck Jullien <franck.jullien@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-11-07 08:21:02 +00:00
Marc Schink ded6799025 libjaylink: Update to latest Git version
This version adds two new USB PIDs and fixes a build issue under MSYS2.

Change-Id: I753fab827783ea64e55e59d833742c9f70a28a2b
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/5309
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2019-10-19 13:27:29 +01:00
Mirko Vogt 382f4f064e nrf5: update links to compatibility matrixes for nrf5x variants
Change-Id: If51aa992ccbb8c9a2e502b74827a36a62010546d
Signed-off-by: Mirko Vogt <mirko.vogt@sensorberg.com>
Reviewed-on: http://openocd.zylin.com/4843
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-10-18 09:24:25 +01:00
Florian Fainelli 16065e06ad target/cortex_a: Extract code to read/write from/to register to/from DCC
In preparation for supporting the ARM MCRR and MRRC commands which will
require using two 32-bit registers to read/write a 64-bit internal
register, extract the common logic to read/write from/to a register
to/from DCC and make that parameterized such that we can do this through
not just r0.

Change-Id: Iadb73f5cde8cf5961b5a18ddd198bf39d791e610
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-on: http://openocd.zylin.com/5227
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-10-18 09:22:58 +01:00
Antonio Borneo e99a43a276 drivers/gw16012: remove useless cast on gw16012_port
The variable gw16012_port is of type uint16_t.
There is no need for a cast to print it.

Change the format modifier to PRIx16

Change-Id: I16fe688b9d235bae46525635d07849a00fba9548
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5195
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2019-10-18 09:22:34 +01:00
Andreas Fritiofson a944ee28d9 gdb_server: Support vRun packet, allow setting cmdline from GDB
GDB uses the vRun packet if available to restart a running process in
extended remote mode. Support this like the R packet and set the
semihosting command-line to allow it to be specified from GDB.

Change-Id: I9cb812b22170630f782113c9927e46e0cd5b1f0f
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/5186
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-10-18 09:21:56 +01:00
Alexey Brodkin c983f8ee00 gdb-server: Create arch-specific structure type for every feature
As it is mentioned here [1] type's ID is unique name within containing feature.

That said if regs of the same type located in different features it's required
to insert type definition at least in each feature.

See more details in discussion here [2].

[1] https://sourceware.org/gdb/onlinedocs/gdb/Target-Description-Format.html#Types
[2] 2a5f5125ac (r33460077)

Change-Id: Id92b061cfbf47d5c032a02c2c406b28affd0b02a
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Reviewed-on: http://openocd.zylin.com/5179
Tested-by: jenkins
Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-10-18 09:21:45 +01:00
Antonio Borneo 5dc5ed5714 target/cortex_a: use aligned accesses for read/write cpu memory slow
Armv7a is able to read and write memory at un-aligned address, but
only when bit SCTLR.A (Alignment check enable) is zero and the
address belongs to a memory space with attribute "Normal" (see [1]
chapter A3.2.1 "Unaligned data access"). In all the other cases
the memory access will trigger an alignment fault data abort
exception.
Memory attributes are explained in [1] chapter A3.5 "Memory types
and attributes and the memory order model".

Disabling the MMU cause a change in memory attribute, as explained
in [1] chapter B3.2 "The effects of disabling MMUs on VMSA
behavior".
This can cause several issues. e.g. a SW breakpoint on un-aligned
4-byte Thumb instruction, set when MMU is on, can be impossible to
remove when MMU turns off.

While is possible to check all the possible conditions before an
un-aligned memory access, it's clearly more maintainable to skip
such complexity and only perform aligned accesses.

Check the alignment and eventually modify the data size before
calling the functions cortex_a_{read,write}_cpu_memory_slow().
Change the comment in the two functions above to comply with the
new behaviour.

[1] ARM DDI 0406C.d - "ARM Architecture Reference Manual, ARMv7-A
    and ARMv7-R edition"

Change-Id: I57b4c11e7fa7e78aaaaee4406a5734b48db740ae
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5138
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-10-18 09:20:58 +01:00
Bohdan Tymkiv 5f42124a40 adi_v5_jtag: avoid RAM exhaustion by limiting jtag queue size
Issue has been found when I tried to read 64 MiB QSPI flash bank.
Bank is memory mapped, default_flash_read() is used for 'flash read_bank'
command. OpenOCD consumed as much as 6.8 GiB of RAM during this
process. Investigation showed that this happens because JTAG queue
is not limited in any way. OpenOCD queues 16 millions of AP reads
allocating all corresponding data structures.

Most of this memory is allocated in:
cmd_queue_alloc (commands.c) - 4.2 GiB
dap_cmd_new (adi_v5_jtag.c) - 2.25GiB

This patch implements a pool of "struct dap_cmd" objects using
linked list. Objects are taken from a pool in "dap_cmd_new()" and
returned to the pool when they are not needed. Size of the pool
is limited to 64K of objects, JTAG queue is forcibly executed
when this limit is reached.

Checked with Valgrind and Clang analyzer - no new warnings.

Change-Id: I5aaaecce5ed71414f7965a2598f49742f6a6b2b5
Signed-off-by: Bohdan Tymkiv <bhdt@cypress.com>
Reviewed-on: http://openocd.zylin.com/4948
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-10-18 09:20:49 +01:00
Andreas Fritiofson 3afb357934 nrf5: Fix misuse of flash bank number
Make driver_priv point directly into the corresponding chip bank structure
and add a pointer to it to get back to its chip when it's needed. This
removes the need to keep track of any bank number, either global or chip-
local.

In addition, it simplifies the cases where the chip structure was just used
to access the chip bank fields; now they are directly accessible.

Change-Id: Iaa353cd4fa7d8ff94c2ef69028c7cb32fade0420
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/4775
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-10-18 09:19:05 +01:00
Andreas Fritiofson f545044c2a target: Switch to target_read_buffer() in verify_image fallback
The current code checks the count to determine whether to read bytes or
words. However it fails to consider whether the base address is suitably
aligned.

Instead use the target_read_buffer() function which is for exactly this
purpose and generates optimal accesses with natural alignment.

Change-Id: I32ab5417890ee2219902df1529bc220fe353b4c7
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3217
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-10-18 09:17:24 +01:00
Moritz 'Morty' Strübe 51ce53d044 src/flash/startup.tcl: Add preverify to program command
The preverify option allows to check whether flashing is necessary.
If the target is flashed often/automatically this can save time and
preserve the flash. This is expecially helpful in CI environments.

Change-Id: Iead0a269e1a772b751d4dd9e8b53b2fecc874624
Signed-off-by: Moritz 'Morty' Strübe <moritz.struebe@redheads.de>
Reviewed-on: http://openocd.zylin.com/5292
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2019-10-15 09:00:45 +01:00
Tim Newsome 462c012066 Add complete JTAG debug logging.
Sample output, with default_interface_jtag_execute_queue replaced by
dijeq to satisfy commit message line length check:
Debug: 646 18 core.c:847 dijeq(): JTAG IR SCAN to RUN/IDLE
Debug: 647 18 core.c:852 dijeq():   5b out: 11
Debug: 648 18 core.c:847 dijeq(): JTAG DR SCAN to RUN/IDLE
Debug: 649 18 core.c:852 dijeq():   40b out: 4400000001
Debug: 650 18 core.c:857 dijeq():   40b in: 4400000000

Signed-off-by: Tim Newsome <tim@sifive.com>
Change-Id: I014e9e3a77755413b36edfcede2ab8f6aa08061b
Reviewed-on: http://openocd.zylin.com/4451
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-10-15 08:59:00 +01:00
Tim Newsome d214cadfef Add wall clock timeout warning to mpsse_flush()
I think that libusb_handle_events_timeout_completed is supposed to make
progress or time out, but sometimes we hit a case where it makes no
progress, and mpsse_flush() loops forever. This wall clock timeout
notifies the user that this is going on.

When I wrote this code, this bug would reproduce every hour or two, but
right now it's not happening for me.

Change-Id: I7eb66f43462298e263a48048aa0c8769095661eb
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: http://openocd.zylin.com/4767
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2019-10-15 08:58:56 +01:00
Christian Meusel 0a13ca1a8a efm32: use device-specific MSC base for EFM32TG11B
According to the reference manual it should be 0x40000000. Flashing (and
booting) a firmware with this MSC base was successful.

Change-Id: I739e67d36555b8170a3b8e26f54cf1c09ce8424b
Signed-off-by: Christian Meusel <christian.meusel@posteo.de>
Reviewed-on: http://openocd.zylin.com/5263
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-10-02 17:34:07 +01:00
Seth LaForge 3110092720 src/jtag/aice: Fix obviously incorrect bit op.
Fix expression "(pin_status | 0x4)" which was always true rather than
testing a bit. Untested - was clearly not expressing the intent of the
author by inspection. Found by automated tooling and rtrieu@google.com.

Signed-off-by: Seth LaForge <sethml@google.com>
Change-Id: I4bb91e60e8ce9757bf21976cc48de6f85a39c68d
Reviewed-on: http://openocd.zylin.com/5301
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-09-24 05:47:43 +01:00
Christopher Head 31a3324b68 helper/command: clear errno before calling parser
The C standard says that errno is set to ERANGE if an out-of-range value
is returned by strtol, strtoul, et. al., but it does not say that errno
is cleared if the function is successful (and, indeed, it is not on
glibc). This means that, if errno is ERANGE before strtol is called, and
if the value to be converted is exactly the maximum (or, for a signed
conversion, the minimum) legal value, COMMAND_PARSE_NUMBER will
erroneously indicate that the value is out of range.

Change-Id: I8a8b50a815b408a38235968f1c1d70297ea1a6aa
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/5298
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-09-24 05:47:18 +01:00
Marc Schink 181d594205 flash/nor/tcl: Fix usage of 'flash erase_sector' command
Change-Id: I2141e377a0531cab8d1140049a2ee7721d30cfdc
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/5299
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-09-24 05:46:52 +01:00
Khem Raj 101345270b esirisc_flash: Rename PAGE_SIZE to FLASH_PAGE_SIZE
PAGE_SIZE is defined in system includes on some systems, this would
avoid the unintended conflict

Fixes
| src/flash/nor/esirisc_flash.c:95:9: error: 'PAGE_SIZE' macro redefined [-Werror,-Wmacro-redefined]
| #define PAGE_SIZE                       4096
|         ^
| /mnt/a/yoe/build/tmp/work/core2-64-yoe-linux-musl/openocd/0.10+gitrAUTOINC+7ee618692f-r0/recipe-sysroot/usr/inclu
de/limits.h:89:9: note: previous definition is here
| #define PAGE_SIZE PAGESIZE

Change-Id: I195b303fc88a7c848ca4e55fd6ba893796df55cc
Signed-off-by: Khem Raj <raj.khem@gmail.com>
Reviewed-on: http://openocd.zylin.com/5180
Tested-by: jenkins
Reviewed-by: Steven Stallion <sstallion@gmail.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2019-09-18 07:05:08 +01:00
Tarek BOCHKATI 09eb941cb8 flash/nor/stm32h7x: remove unused 'pages_per_sector' from stm32h7x_part_info
Change-Id: I1b79c25cada574e3a9849f506443c836bd707604
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5289
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Christopher Head <chead@zaber.com>
2019-09-08 11:55:19 +01:00
Tarek BOCHKATI 5b06b88af8 flash/nor/stm32h7x: remove flash size information from device name
There is no sense in displaying the max size (2M) as there is variants
of this device with reduced flash size

Change-Id: I40574064d75fdf2a038044c81038a6d7abc6c4dd
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5288
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-09-08 11:54:34 +01:00
Caleb Szalacinski 5a235226f0 flash/nor: flash driver for Synwit SWM050 MCUs
SWM050 is a series of MCU product by Foshan Synwit Tech, which is
available in TSSOP-8 or SSOP-16 packages.

Adds flash driver for the internal 8KiB flash of the MCU. The registers
are based on reverse engineering the J-Flash blob provided by the
vendor.

Also adds a pre-made cfg file.

Change-Id: I0b29f0c0d062883542ee743e0750a4c6b6609ebd
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Caleb Szalacinski <contact@skiboy.net>
Reviewed-on: http://openocd.zylin.com/4927
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2019-09-08 11:53:12 +01:00
Han Hartgers 642a9310ca target/dsp563xx: dsp563xx restore reg support
Added "exist=true" field to the reg_list struct to make access to the
dsp563xx registers again possible. Without it defaults to exist=false
and all the reg related functions will return nothing.

Fixes regression from b5964191f0

Change-Id: I9c256346735b8d66919c4ba83f528a8afca46ff9
Signed-off-by: Han Hartgers <han.hartgers@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5239
Tested-by: jenkins
2019-09-08 11:52:06 +01:00
Seth LaForge 844c82934e src/flash/nand: Fix some operator precedence bugs.
Fix two expressions where precedence of operator | vs ?: was clearly confused.
Untested - was clearly not expressing the intent of the author by inspection.
Found by automated tooling and rtrieu@google.com.

Change-Id: I46f190154797f8affc761caf3a15a1a9db53d702
Signed-off-by: Seth LaForge <sethml@google.com>
Reviewed-on: http://openocd.zylin.com/5281
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2019-09-08 11:51:21 +01:00
Tim Newsome 0819541366 gdb_server, rtos: Fine-grained RTOS register access
1. Add get_thread_reg() to rtos. It's used in rtos_get_gdb_reg() to read
the value of a single register, instead of reading all register values
by calling get_thread_reg_list().
2. Add set_reg() to rtos. gdb_server uses this to change a single
register value for a specific thread.
3. Add target_get_gdb_reg_list_noread() so it's possible for gdb to get
a list of registers without attempting to read their contents.

The clang static checker doesn't find any new problems with this change.

Change-Id: I77f792d1238cb015b91527ca8cb99593ccc8870e
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: http://openocd.zylin.com/5114
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-08-28 08:07:37 +01:00
Tarek BOCHKATI 16496488d1 flash/nor/core: fix some minor typo
Change-Id: I03832b3e4a6eaadfd87729a3a898e0a2cd30931a
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5264
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-08-04 09:31:38 +01:00
Andreas Fritiofson 7a93c9e087 mflash: Remove this broken flash driver
This is causing repeated build failures. Its design is so fundamentally
broken that if someone actually wants to use it, a full rewrite is the
only option. So it's not even worth deprecating in the hope that someone
will notice and fix it, just get rid of it.

Change-Id: I513069919a3873bd69253110f7fb6f622ee7d061
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/5243
Tested-by: jenkins
Reviewed-by: Jeffrey Booher-Kaeding <Jeff.Booher-Kaeding@arm.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-07-28 21:17:47 +01:00
Antonio Borneo 6ea43726a8 cortex_m: set C_DEBUGEN in soft_reset_halt
The command "soft_reset_halt" is deprecated since mid 2013 with
the commit 146dfe3295 ("cortex_m: deprecate soft_reset_halt").
Nevertheless it is still extremely useful with multicore chips
where it allows to reset only one of the cores, option not
available through asserting the chip-wide srst.
Without a better replacement of the command, it's worth fixing it.

Accordingly to ARM DDI 0403E.d, chapter C1.4.1 "Entering Debug
state on leaving reset state", to halt the core at reset both bits
DHCSR.C_DEBUGEN and DEMCR.VC_CORERESET must be set.
Current code only sets the latter bit, relying on having C_DEBUGEN
already set through other commands, e.g. "halt". This prevents the
command "soft_reset_halt" to work if issued as very first command.

Set the bit C_DEBUGEN in command "soft_reset_halt".

Change-Id: I66bfd6a0da1fca5049dea037b4d258cf6f842966
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4987
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-20 19:51:01 +01:00
Antonio Borneo a521d93b7a helper/options: simplify the code using command_run_linef()
Thanks to command_run_linef() there is no need to pre-build the
command using alloc_printf().

Change-Id: Iccfebd6063d1ac162f090fe2309b1f51bebf0214
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5226
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-20 19:50:38 +01:00
Christopher Head 77a8914b7f helper/command: make command_run_line reentrant
The `command_run_line` function contains a comment saying it should be
reentrant. However, it isn’t: it NULLs out `current_target_override` and
doesn’t restore it before returning, and it changes the `context`
associated data of the `interp` object and then deletes that associated
data before returning rather than restoring it to its previous value.

Change-Id: I84fd46ef7173f08cf7c57b9a5b76e4986a60816f
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/5223
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-20 19:50:22 +01:00
Marc Schink 0d47d85ff5 target/cortex_m: Add support for AHB5-AP
The AHB5-AP is implemented in Cortex-M23/33 based devices.

Change-Id: I505954a2e2c6462ce0aa96eba1d55b016c5028b9
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/5232
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Tested-by: jenkins
2019-06-19 10:17:38 +01:00
Marc Schink 1f1558e74b target/arm_adiv5: Add type for AHB5-AP
This access port type comes with the AMBA 5 protocol specification,
see 'C1.3 AP' in ARM IHI 0031D.

Change-Id: I3c4f0a69230daaf4f5f979de6213fe3c025a089a
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/5231
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org>
2019-06-19 09:51:54 +01:00
Omair Javaid bc94ca241a Support for debugging on ARMv8-M CPUs
This patch adds ARMv8-M CPUs detection logic in ARMv7m target specific code.

Also adds a slightly different watchpoint manipulation logic for ARMv8-M.

This is based on ARMv8-M architecture reference manual.

Tested on ARM Musca A board.

Change-Id: I0652560954ef02c378a7067fab586edf39d3e9cc
Signed-off-by: Omair Javaid <omair.javaid@linaro.org>
Reviewed-on: http://openocd.zylin.com/4997
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-19 09:35:05 +01:00
Antonio Borneo 4dbcb1e79d target/cortex_a: remove dependency from jtag queue
Replace jtag specific API jtag_add_reset() with transport
independent API adapter_{de}assert_reset().

Change-Id: I1b917a4c1205115c4e0315373d81a9305e931258
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4944
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-06-14 12:10:56 +01:00
Antonio Borneo 18f4ef0f5e target/aarch64: remove dependency from jtag queue
Replace jtag specific API jtag_add_reset() with transport
independent API adapter_{de}assert_reset().

Change-Id: I32c43e2e47366363521fa3f387de9e2fb1c20852
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4943
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-06-14 12:10:40 +01:00
Antonio Borneo 9879f9bf04 jtag: fix error on TCL command "return" in jtag event handler
The TCL command "return" always returns error code JIM_RETURN, to
indicate that the effective error code and message are elsewhere.

In the current implementation, the caller of jtag's event only
checks for return code JIM_OK and considers any other value,
including JIM_RETURN, as an error condition.

It can be tested running openocd on a jtag target and adding a
jtag event "setup" with a single line "return", e.g.
	openocd -f board/ti_cc3200_launchxl.cfg \
	-c 'jtag configure cc32xx.cpu -event setup return'
to get the message:
	../src/jtag/core.c:1599: Error:
	in procedure 'jtag_init' called at file "../src/jtag/core.c",
	line 1599

Modify jtag_tap_handle_event() to detect the specific return value
of the "return" command and to test the real error code that is,
eventually, specified to the TCL "return" command.

Change-Id: I6d6febc15ef169638afffbffc1810e0b84fcf5c8
Reported-by: Tomas Vanek <vanekt@fbl.cz>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5199
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-13 12:40:51 +01:00
Antonio Borneo 1af83682e0 target: fix error on TCL command "return" in target event handler
The TCL command "return" always returns error code JIM_RETURN, to
indicate that the effective error code and message are elsewhere.

In the current implementation, the caller of target's event only
checks for return code JIM_OK and considers any other value,
including JIM_RETURN, as an error condition, thus dumping the
call-trace. The execution is not stopped because the error is not
further propagated, but the error message is annoying and
misleading.

It can be tested running
	openocd -f ./test.cfg
using the following script "test.cfg". You can replace the board
file in line 1, to use a board available in your lab:
  1	source [find board/st_nucleo_f4.cfg]
  2	[target current] configure -event reset-start {}
  3	[target current] configure -event reset-end {return}
  4	init
  5	proc a {} {[target current] invoke-event reset-start}
  6	proc b {} {[target current] invoke-event reset-end}
  7	proc c {} {a;b;echo "arrived at the end"}
  8	c
  9	shutdown
The execution produces:
	./test.cfg:7: Error:
	in procedure 'c' called at file "./test.cfg", line 8
	in procedure 'b' called at file "./test.cfg", line 7

	arrived at the end
that shows the call-trace but does not halt the execution.

The developer can avoid using the "return" command in the event
body by defining a TCL procedure that implements the handler and
that contains the "return" command, reducing the handler body to
a simple call to the procedure above. But this approach is either
not documented nor always intuitive while writing the handler,
causing waste of time to look for the false error.

Modify target_handle_event() to detect the specific return value
of the "return" command and to test the real error code that is,
eventually, specified to the TCL "return" command.

Change-Id: I2b860bab7233c6ed13ee4098e348d7533e1c4626
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4974
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-13 12:40:37 +01:00
Tarek BOCHKATI e6990bdd00 flash/stm32h7x: fix register names to comply with RM0399 Rev2 and RM0433 Rev6
Change-Id: I085d86a2a47f4aeef93a99238e3b80ee294d46df
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5192
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-13 12:40:16 +01:00
Tilman Sauerbeck 8ed19a2e29 jtag: drivers: buspirate: chunk SWD switch sequence transfer.
Commit c2e18bfaea changed the size of the JTAG-to-SWD sequence
from 15 bytes to 17 bytes. This broke SWD switch sequence transfer
for buspirate, since buspirate packets can only hold a payload of up
to 16 bytes and we tried to fit the whole sequence in a single packet.

Splitting up the sequence transfer in appropriately sized packets
makes buspirate SWD work again (successfully tested with buspirate
firmwares v6.1 and v7.0).

Change-Id: Ib5b412b9e77287d705d2762e31c16d30318b50e3
Signed-off-by: Tilman Sauerbeck <tilman@code-monkey.de>
Reviewed-on: http://openocd.zylin.com/5200
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-13 12:39:38 +01:00
Christopher Head b6fa208759 jtag/drivers/jtag_usb_common: fix typo
Change-Id: If1f56fd5d610b993a4ecbc900fac9f90638037c9
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/5202
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-13 12:39:09 +01:00
Tomas Vanek 20396e56b7 target: make target re-configuration possible again
Before commit 877cec20dc
("command: check command mode for native jim commands") all the jim commands
were erroneously treated as they had mode COMMAND_ANY.

The command '$_TARGET configure -xxx' was therefore applicable on running
OpenOCD to change the target configuration. It is handy e.g. for changing
an event handler or changes of the work area.

Change 'configure' command .mode to COMMAND_ANY to make it possible again.

The only parameter which cannot be re-configured after init is -gdb-port.
Test the command mode and refuse setting of gdb port after init.

Change-Id: I88493ac10a46647dc52a88fbc9f8ce6b5ba3bcd0
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5214
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-06-12 15:15:51 +01:00
Michael Schwingen 7a27423e31 fix XScale register access
since b5964191f0, all XScale-specific registers were missing, breaking
config scripts.

Change-Id: Ia56f3ca17500ba54bd08f417e9a5aaaa8a1be8c4
Signed-off-by: Michael Schwingen <spam-openocd@discworld.dascon.de>
Reviewed-on: http://openocd.zylin.com/5136
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-12 15:15:40 +01:00
Antonio Borneo 48478967db mem_ap: fix format of logged addresses
The macro TARGET_ADDR_FMT, defined in helper/types.h, already
includes the prefix "0x" in front of the hexadecimal number,
being defined as:
	#define TARGET_ADDR_FMT "0x%8.8" TARGET_PRIxADDR
An additional "0x" is present in mem_ap; it prints debug messages
with a double "0x" before the address:
	Debug: 2921 34180 mem_ap.c:153 mem_ap_write_memory():
	Writing memory at physical address 0x0x5000000c; size 4;
	count 1

Remove the incorrect hexadecimal prefix.

Change-Id: I38f19ed2a2f542bd5df53e947a2604f1cbe80e08
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5222
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-06-12 15:15:29 +01:00
Daniel Goehring 88728abee1 ARMv8: Update rtos_reg storage from 8 to 16 bytes
To support 128 bit registers, the rtos_reg structure value
array needs to be updated from 8 to 16 bytes.

Tested by reading ARMv8 NEON FP regs on an Ampere eMAG 8180 with GDB.

Change-Id: I7f3fe1a5b2def599d021787fbe9cdd51f92859a4
Signed-off-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
Reviewed-on: http://openocd.zylin.com/5209
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-06-12 15:15:15 +01:00
Florian Fainelli f935f39cda armv7a_mmu: Add support for decoding Super Sections
The ARMv7-A architecture supports super sections which allows mapping
physical addresses up to 40-bit into a 32-bit virtual address using the
short descriptor format (see ARM DDI 0406C.c section B4.1.112 for
details).

Change-Id: I8e64d0e93e36ae7a7da7b7bf2a8342856bb044f1
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-on: http://openocd.zylin.com/5212
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-06-12 15:14:50 +01:00
Florian Fainelli eeabbd58c0 armv7a_mmu: Do not restrict virtual addresses to uint32_t
In preparation for adding super section decoding, do not restrict
armv7a_mmu_translate_va_pa() to 32-bit virtual addresses since ARMv7-A
processors with VMSA extensions (including LPAE) can issue wider
physical addresses. Update casting to uint32_t where necessary.

Change-Id: Id1c3d0d5ac324cbdc334259d9ea75fe4981671a1
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-on: http://openocd.zylin.com/5211
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-06-12 15:14:44 +01:00
Florian Fainelli 604dded6f1 armv7a_mmu: Remove armv7a_mmu_translate_va()
This function is not used anywhere in the tree, remove it, such that we
only have a single function moving forward that might need to deal with
short vs. long format specifics.

Change-Id: I80e81cd7eba1e028d1afaeaedb675b46c0ca6fa1
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-on: http://openocd.zylin.com/5213
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-06-12 15:14:37 +01:00
Florian Fainelli ba11adb833 armv7a_mmu: Check earlier for PAR read
Check earlier that the read of the PAR register was successful instead
of starting the decoding and then checking for an error reading that
register.

Change-Id: Id96c2b2f76d2d1c745fcfa55ad4c1e6db92106f9
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-on: http://openocd.zylin.com/5215
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-06-12 15:14:27 +01:00
Tomas Vanek 215f14bec8 target/armv7m: fix register number in armv7m_get_core_reg()
armv7m_get_core_reg() calls arm->read_core_reg()
arm->read_core_reg() expects the register number as an index
to core reglist, not an ARMv7M specific register code.
Use reg->number instead of armv7m_reg->num.

The change solves assert
  src/target/armv7m.c:222: armv7m_read_core_reg: Assertion
  `num < (int)armv7m->arm.core_cache->num_regs' failed.
when gdb 'info reg' is issued on a Cortex-M target and
no cortex_m_debug_entry() has been called since OpenOCD start
(target was halted before OpenOCD start).

Change-Id: I32a2294693ef979b613be93aeceb3b0eb06ee6df
Ticket: https://sourceforge.net/p/openocd/tickets/216/
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5203
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-06-10 20:35:39 +01:00
Antonio Borneo 159f11fefc jtag: set default "jtag_only" to uninitialized transports
For legacy support, drivers that do not define a list of
transports get identified as jtag_only.

Cleanup this old crust and initialize properly the transports
field in the jtag_interface for all the drivers.

Change-Id: I9c86064e5d05bd0212bc18f4424414e615e617fe
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4893
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-06 16:45:31 +01:00
Antonio Borneo 0cba5b4ea3 gdb_server: remove call to jtag_execute_queue()
In the initial commit 6c9b804d61
in 2007's svn://svn.berlios.de/openocd/trunk@246
a target script gdb_program_config was called before gdb flash
programming. To guarantee the script does not left any pending
command in the jtag queue, a call to jtag_execute_queue() was
inserted after the execution of the script.

In following commit ef1cfb2394
in 2008's svn://svn.berlios.de/openocd/trunk@975
the script was replaced by the event "old-gdb_program_config" and
the call to jtag_execute_queue() get executed in every case, even
if the event handler was not present.

At last, commit bb3793c9a4
("target: remove legacy target events") stripped away the
obsolete event but left the call to jtag_execute_queue(), now
completely useless.

Remove the call to jtag_execute_queue() and clean-up the code
around it.

Change-Id: I284f54d656d431ad6cdc25ca18218c09db31bd25
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4911
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-06 16:33:41 +01:00
Antonio Borneo 02cd1e39cc target/cortex_m: remove dependency from jtag queue
Since the first commit 09883194f8 that introduced cortex_m, the
code has a delay of 50ms after srst has been asserted.
The specific delay is implemented through the JTAG_SLEEP command
sent in the jtag queue.

To remove the dependency from the jtag queue, replace the delay
with a transport independent function.

In case of jtag transport, this change keeps the same behaviour
only if the jtag queue has been flushed before the delay. This
does not happen if the call to dap_dp_init(), few lines above,
fails while calling a dap_queue_dp_{read,write}(); in this case
the jtag queue will be flushed later, after the delay, while in
the original code the delay would follow the flushing of the
commands already queued. Anyway, this different behavior would
only happen in case of DAP already not responsive so anticipating
the delay in such error condition is not supposed to add further
problems.

Change-Id: If15978246764e4266b10e707d86c03e5ed907de7
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4912
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-06 16:33:30 +01:00
Antonio Borneo e5177a5ad4 helper: add bitmap helper primitives
Mainly copied/inspired from Linux kernel code in
- include/linux/types.h
- include/linux/bitmap.h
- include/linux/bitops.h

Change-Id: I317b542993ab81530c86553f339b79505d0fef0f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4894
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-06 16:32:57 +01:00
Antonio Borneo e26910fdad jtag: simplify management of non-implemented handlers
There is just a single entry point for the jtag API .khz(),
.speed_div(), .power_dropout(), .srst_asserted().

Simplify the code by in-lining the default handler.
The overall code behaviour is not changed.
This change prevents modifying at run-time the content of
struct jtag_interface.

Inspired from change http://openocd.zylin.com/943
by Evan Hunter <ehunter@broadcom.com>

Change-Id: I09aeb76d614db57b1884ac7ee9f00c152cd77849
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4892
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-06 16:21:23 +01:00
Antonio Borneo 7cddeb0af2 swd: remove unused API frequency()
The specific SWD API to change/query the adapter speed is never
called because the equivalent JTAG API is used in place of it.
In the restructure of struct jtag_interface, the JTAG API is
promoted as global adapter API, thus a specific SWD one is not
anymore required.

Change-Id: I1e810d255b4dfcd5791b4fac8ae1260c31a057fd
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4891
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-06 16:20:58 +01:00