flash/nor/nrf5: show RAM size on old nRF51 devices (rev 1, 2)
Change-Id: I2452c084b9bd9e401bd49e15791428a53df1cd1d Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4868 Tested-by: jenkins
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@ -157,6 +157,7 @@ struct nrf5_info {
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uint32_t hwid;
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enum nrf5_features features;
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unsigned int flash_size_kb;
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unsigned int ram_size_kb;
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};
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#define NRF51_DEVICE_DEF(id, pt, var, bcode, fsize) \
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@ -589,29 +590,31 @@ static int nrf5_info(struct flash_bank *bank, char *buf, int buf_size)
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{
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struct nrf5_bank *nbank = bank->driver_priv;
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struct nrf5_info *chip = nbank->chip;
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int res;
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if (chip->spec) {
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snprintf(buf, buf_size,
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"nRF%s-%s(build code: %s) %ukB Flash",
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chip->spec->part, chip->spec->variant, chip->spec->build_code,
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chip->flash_size_kb);
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res = snprintf(buf, buf_size,
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"nRF%s-%s(build code: %s)",
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chip->spec->part, chip->spec->variant, chip->spec->build_code);
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} else if (chip->ficr_info_valid) {
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char variant[5];
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nrf5_info_variant_to_str(chip->ficr_info.variant, variant);
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snprintf(buf, buf_size,
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"nRF%" PRIx32 "-%s%.2s(build code: %s) %" PRIu32
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"kB Flash, %" PRIu32 "kB RAM",
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res = snprintf(buf, buf_size,
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"nRF%" PRIx32 "-%s%.2s(build code: %s)",
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chip->ficr_info.part,
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nrf5_decode_info_package(chip->ficr_info.package),
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variant, &variant[2],
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chip->flash_size_kb,
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chip->ficr_info.ram);
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variant, &variant[2]);
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} else {
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snprintf(buf, buf_size, "nRF51xxx (HWID 0x%04" PRIx16 ") %ukB Flash",
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chip->hwid, chip->flash_size_kb);
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res = snprintf(buf, buf_size, "nRF51xxx (HWID 0x%04" PRIx16 ")",
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chip->hwid);
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}
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if (res <= 0)
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return ERROR_FAIL;
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snprintf(buf + res, buf_size - res, " %ukB Flash, %ukB RAM",
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chip->flash_size_kb, chip->ram_size_kb);
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return ERROR_OK;
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}
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@ -681,6 +684,39 @@ static int nrf5_read_ficr_info(struct nrf5_info *chip)
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return ERROR_OK;
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}
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static int nrf5_get_ram_size(struct target *target, uint32_t *ram_size)
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{
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int res;
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*ram_size = 0;
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uint32_t numramblock;
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res = target_read_u32(target, NRF51_FICR_NUMRAMBLOCK, &numramblock);
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if (res != ERROR_OK) {
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LOG_DEBUG("Couldn't read FICR NUMRAMBLOCK register");
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return res;
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}
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if (numramblock < 1 || numramblock > 4) {
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LOG_DEBUG("FICR NUMRAMBLOCK strange value %" PRIx32, numramblock);
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return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
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}
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for (unsigned int i = 0; i < numramblock; i++) {
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uint32_t sizeramblock;
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res = target_read_u32(target, NRF51_FICR_SIZERAMBLOCK0 + sizeof(uint32_t)*i, &sizeramblock);
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if (res != ERROR_OK) {
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LOG_DEBUG("Couldn't read FICR NUMRAMBLOCK register");
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return res;
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}
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if (sizeramblock < 1024 || sizeramblock > 65536)
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LOG_DEBUG("FICR SIZERAMBLOCK strange value %" PRIx32, sizeramblock);
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else
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*ram_size += sizeramblock;
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}
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return res;
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}
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static int nrf5_probe(struct flash_bank *bank)
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{
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int res;
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@ -720,6 +756,14 @@ static int nrf5_probe(struct flash_bank *bank)
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PRIx32, chip->hwid, chip->ficr_info.part);
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}
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if (chip->ficr_info_valid) {
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chip->ram_size_kb = chip->ficr_info.ram;
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} else {
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uint32_t ram_size;
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nrf5_get_ram_size(target, &ram_size);
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chip->ram_size_kb = ram_size / 1024;
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}
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/* The value stored in NRF5_FICR_CODEPAGESIZE is the number of bytes in one page of FLASH. */
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uint32_t flash_page_size;
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res = target_read_u32(chip->target, NRF5_FICR_CODEPAGESIZE,
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