Now:
1) If mmu is disabled, virt2phys succeeded and returns physical address
2) If mmu is enbaled, but translation fails, read/write_memory fails
Change-Id: I312309c660239014b3278cb77cadc5618de8e4de
Signed-off-by: Kirill Radkin <kirill.radkin@syntacore.com>
Removing flash driver "gd32vf103_flash".
This driver has been deprecated since June-1-2022, and was scheduled
for removal in June 2023.
Change-Id: Ib6f4dcba11e91a095b3a20eedd864589084b7fa9
Signed-off-by: Jan Matyas <jan.matyas@codasip.com>
This incorrect extra call has been removed in upstream code already
in March 2022, see https://review.openocd.org/c/openocd/+/6836 .
Remove it from riscv-openocd as well.
Change-Id: Ie341f5578c8bfdc518adf1e4bc134919ab76f803
Signed-off-by: Jan Matyas <jan.matyas@codasip.com>
In jtag_libusb_open I've added a parameter for delivering the device
description for which this function should search and adjusted all
callers of this function. A new driver for WCH CH347 JTAG chips
will use this new parameter.
See also: https://review.openocd.org/c/openocd/+/7937
Change-Id: I85e1d7b1f7912ba5e223f0f26323ff3b7600e17d
Signed-off-by: EasyDevKits <info@easydevkits.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7938
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Add result check for mips32_pracc_read_regs in mips32_save_context.
Change-Id: Ie796d2b05a9feb11e246c2d0771b52cad4fb70db
Signed-off-by: Walter Ji <walter.ji@oss.cipunited.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7932
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reintroduce checkpatch problem, because now we can handle them better.
Change-Id: Ib81b9910433ae1a240630b898edb19da8d2d5d83
Signed-off-by: Tim Newsome <tim@sifive.com>
This makes it easier to look at log files where multiple gdb instances
are connected.
Change-Id: Ic5aca52b32ee03ac35ffbed9a2fc552abb0a1cba
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7895
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Previously, when listing the watchpoints, OpenOCD printed
numbers 0, 1 and 2 representing READ, WRITE and ACCESS type
watchpoints.
This patch changes it to 'r', 'w' and 'a'. This increases the
clarity as what type the watchpoint actually is.
Change-Id: I9eac72dfd0bb2a9596a5b0c080a3f584556ed599
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7909
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
This patch adds the "all" option to the rwp command.
It removes all watchpoints, much like rbp all removes
all breakpoints.
Change-Id: Id58dd103085e558f17afa4a287888cf085566ca9
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7907
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Previously, if you ran a tcl command in capture like so:
"capture { reg 0x1000 hw }"
Such command did overwrite the tcl result if LOG_LVL_INFO or
lower was logged during it.
This patch changes it by prepending the log to the tcl result instead.
As the tcl results should not be lost during capture.
Change-Id: I37381b45e15c931ba2844d65c9d38f6ed2f6e4fd
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7902
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
If wp/bp is missing at address rwp/rbp won't return zero code (on smp).
Now it fixed.
Fixes: 022e438292 ("target: Change policy of removing watchpoints/breakpoints.")
Change-Id: I3a3c245f7088fc23227b286d2191fc7f3edba702
Signed-off-by: Kirill Radkin <kirill.radkin@syntacore.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7910
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Add support for the ARM MCRR/MRRC instructions which require the use of
two registers to transfer a 64-bit co-processor registers. We are going
to use this in a subsequent patch in order to properly dump 64-bit page
table descriptors that exist on ARMv7A with VMSA extensions.
We make use of r0 and r1 to transfer 64-bit quantities to/from DCC.
Change-Id: Ic4975026c1ae4f2853795575ac7701d541248736
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Michael Chalfant <michael.chalfant@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/5228
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
When asked to resume an unavailable target, resume any available targets
and report success.
Change-Id: Ieafc63794c1a6eba8948c0f9ce84fa74f9765041
Signed-off-by: Tim Newsome <tim@sifive.com>
When a target in an SMP group is unavailable, the gdb layer might get an
event for a different target in that SMP group, but not one that is the
primary target for that gdb connection. So propagate events if they're
for any of the targets in the SMP group, not just if it's for the first
one in that group.
Change-Id: I8d6738762acc7c0aef96f56ce2cb7f2eeb233b33
Signed-off-by: Tim Newsome <tim@sifive.com>
Exit early if conditions aren't satisfied, instead of putting the core
code inside an if().
Also return ERROR_FAIL if conditions are satisfied but no matching
registers were found.
Change-Id: I77aa63d9f707bc38d1a71899275ba603914b52c9
Signed-off-by: Tim Newsome <tim@sifive.com>
Currently, instruction cache is being invalidated in
arc_{un,}set_breakpoint() regardless of whether the breakpoint's type is
HW or SW. For SW breakpoints, this has no net effect as the caches are
flushed as a by-product of overwriting instructions in main memory and
is thus merely unnecessary; but for HW breakpoints this invalidation is
not preceded by a flush and might lead to loss of data. This patch
removes the invalidate() call altogether to correct this undesired
behavior for HW breakpoints.
With this patch applied, all supported HW breakpoint tests from the gdb
testsuite are now passing with the arc-openocd backend.
Change-Id: I3d252b97f01f1a1e2bf0eb8fb257bdab0c544bc2
Signed-off-by: Artemiy Volkov <artemiy@synopsys.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7767
Tested-by: jenkins
Reviewed-by: Evgeniy Didin <didin@synopsys.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
The comment above armv8_dpm_read_current_registers() doesn't match
the implementation, as the function reads all the registers from
ARMV8_PC and above.
The registers currently read are not relevant to answer to the
usual GDB initial request through the 'g' packet. Plus the lack of
differentiation per core state (AArch32 vs AArch64) causes the
read of not existing registers in AArch32 triggering errors, as
tentatively fixed by https://review.openocd.org/5517/
Fix the code to read the registers initially required by GDB.
Modify the comment to report the register list in AArch32 and in
AArch64.
Keep the extra checks inside the read loop, even if they are
mostly irrelevant; this could prevent errors if someone needs to
extend the number of registers to read.
The current implementation of the register's description in
OpenOCD does not allow to discriminate among AArch32 and AArch64
registers. Add a TODO comment to highlight it.
Change-Id: Icd47d93c19a9e1694a7b51bbc5ca7e21a578df41
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7887
Tested-by: jenkins
Move `examine_attempted` flag to target struct to make it target specific.
`Info` messages for retry and `Error` messages for failure added.
Change-Id: Id2fbe7dc68d746c936c8412289d0d149fbd80d71
Signed-off-by: Kirill Radkin <kirill.radkin@syntacore.com>
The secure microcontroller Infineon SLx2 uses a custom Cortex-M33.
The register CPUID reports value 0x490FDB00.
Reference link to the product:
Link: https://www.infineon.com/cms/en/about-infineon/press/market-news/2022/INFCSS202211-034.html
Change-Id: I8911712c55bd50e24ed53cf49958352f470027a5
Signed-off-by: Ahmed Boughanmi <boughanmi.external@infineon.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7879
Reviewed-by: Karl Palsson <karlp@tweak.au>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
This patch adds error reporting when unknown image type is specified.
Previously, OpenOCD replied with an empty string.
Change-Id: I16220b1f5deb3b966a21731f0adf7911a78e8959
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7883
Tested-by: jenkins
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Add a new riscv specific commands to disable triggers
Change-Id: Ic1842085aa66851c740e0abcbfbe0adbe930920e
Signed-off-by: Kirill Radkin <kirill.radkin@syntacore.com>
If it fails, then pass that failure on. If it's simply not implemented,
then we can fall through and try target_get_gdb_reg_list_noread().
This difference matters when the target representing the current
hwthread is unavailable, but the target that is linked to the gdb
connection is available. In that case we want the operation to return an
error to gdb, instead of reading the register from the target that is
available.
Change-Id: I9c84ca556f818c5580e25ab349a34a226fcf0f43
Signed-off-by: Tim Newsome <tim@sifive.com>
When gdb requests to step an unavailable target, report success. When
the target becomes available, the step can complete.
Change-Id: I969ab56139f72a757552928d59edf6eabd598fa4
Signed-off-by: Tim Newsome <tim@sifive.com>
Extend riscv set_ebreak* commands.
Now it can be called without args to print current value.
riscv_ebreak* flags are moved to riscv_info struct.
Change-Id: Ib46e6b6dfc0117599c7f6715c7aaf113e63bd7dc
Signed-off-by: Kirill Radkin <kirill.radkin@syntacore.com>
Previously, the bcm2835_peri_base value would be printed as a decimal
value despite having a "0x" prefix, implying it should be a hex value.
BCM2835 GPIO: peripheral_base = 0x1056964608
Now, the value is correctly converted to hexidecimal.
BCM2835 GPIO: peripheral_base = 0x3F000000
Change-Id: Id59185423917e6350f99ef68320e2102a3192291
Fixes: b41b368255 ("jtag/drivers/bcm2835gpio: extend peripheral_base to off_t")
Signed-off-by: Vincent Fazio <vfazio@xes-inc.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7888
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
and DP_SELECT_DPBANK.
Use the defined symbols instead of magic numbers.
Change-Id: I19c86b183e57e42b96f76eed180c0492cd67bee1
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7539
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
DP_SELECT_APSEL and DP_SELECT_APBANK is no more used in ADIv6.
Change-Id: I4176574d46c6dc8eb3fe3aef6daab6e33492c050
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7538
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
add refresh command for lattice devices
rename gowin reprogram to refresh
rename virtex2 program to refresh
Change-Id: I9da83a614b96da3e947ac4608b0a291b1d126914
Signed-off-by: Daniel Anselmi <danselmi@gmx.ch>
Reviewed-on: https://review.openocd.org/c/openocd/+/7839
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Provide jtagspi with specific procedures to be able to
use jtagspi for programming spi-flash devices on cologne
chip gatemate devices.
Change-Id: Ifa1c4ca6e215d7f49bd21620898991af213812e9
Signed-off-by: Daniel Anselmi <danselmi@gmx.ch>
Reviewed-on: https://review.openocd.org/c/openocd/+/7838
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Provide jtagspi with information to use jtagspi for
programming spi-flash devices on intel devices using
a proxy bitstream.
Change-Id: Ib947b8c0dd61e2c6fa8beeb30074606131b1480f
Signed-off-by: Daniel Anselmi <danselmi@gmx.ch>
Reviewed-on: https://review.openocd.org/c/openocd/+/7837
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Provide jtagspi with information to use jtagspi for
programming spi-flash devices on xilinx devices
using a proxy bitstream.
Change-Id: I68000d71de25118ed8a8603e544cff1dc69bd9ba
Signed-off-by: Daniel Anselmi <danselmi@gmx.ch>
Reviewed-on: https://review.openocd.org/c/openocd/+/7836
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Provide jtagspi with information to use jtagspi for
programming spi-flash devices on efinix trion and
titanium devices using a proxy bitstream.
Change-Id: I4a851fcaafe832c35bd7b825d95a3d08e4d57a7b
Signed-off-by: Daniel Anselmi <danselmi@gmx.ch>
Reviewed-on: https://review.openocd.org/c/openocd/+/7826
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Provide jtagspi with specific procedures to be able to
use jtagspi for programming spi-flash devices on lattice
certus and certus po devices.
Change-Id: I6a8ec16be78f86073a4ef5302f6241185b08e1c6
Signed-off-by: Daniel Anselmi <danselmi@gmx.ch>
Reviewed-on: https://review.openocd.org/c/openocd/+/7825
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Provide jtagspi with specific procedures to be able to
use jtagspi for programming spi-flash devices on lattice
ecp5 devices.
Change-Id: I4a4a60f21d7e8685a5b8320b9c6ebdc2693bbd21
Signed-off-by: Daniel Anselmi <danselmi@gmx.ch>
Reviewed-on: https://review.openocd.org/c/openocd/+/7824
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Provide jtagspi with specific procedures to be able to
use jtagspi for programming spi-flash devices on lattice
ecp2 and ecp3 devices.
Change-Id: I39028aba47a74a0479be16d52d318f4bff7f2ed4
Signed-off-by: Daniel Anselmi <danselmi@gmx.ch>
Reviewed-on: https://review.openocd.org/c/openocd/+/7823
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Jtagspi is using a proxy bitstream to "connect" JTAG to the
SPI pins. This is not possible with all FPGA vendors/families.
In this cases a dedicated procedure is needed to establish such
a connection.
This patch adds a jtagspi-mode for these cases. It also adds the
needed interfaces to jtagspi and the pld-driver so the driver
can select the mode and provide the necessary procedures.
For the cases where a proxy bitstream is needed, the pld driver
will select the mode and provide instruction code needed in this
case.
Change-Id: I9563f26739589157b39a3664a73d91152cd13f77
Signed-off-by: Daniel Anselmi <danselmi@gmx.ch>
Reviewed-on: https://review.openocd.org/c/openocd/+/7822
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
struct flash_bank must be zeroed anyway, calloc() is always used.
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Change-Id: I7ab3b9c66f99688c6095a0a547a05448c9e37d68
Reviewed-on: https://review.openocd.org/c/openocd/+/7885
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
at91sam7 flash driver allocates a flash bank based on detected flash
structure.
Use calloc() instead of malloc() - struct flash_bank has to be zeroed.
While on this:
Return error in case of struct flash_bank or driver_priv allocation fail.
Set default_padded_value and erased_value.
Use strdup() on bank->name, pointer is freed in flash_free_all_banks()
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Change-Id: Id890496bfbadb7970ef583256aa4f30a7bff832f
Reviewed-on: https://review.openocd.org/c/openocd/+/7884
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
`riscv_debug_reg_to_s()` can be used to decode register value. If the
pointer to buffer is `NULL` it does not print anything, just returns the
length of the string.
The format is:
`<register_value> { <field_name>=<field_value_name or field_value>, ..., }`
e.g:
`0x400382 { version=2, ... ndmresetpending=false, }`
`0x321009 { regno=0x1009, ... cmdtype=0, }`
Change-Id: I63733d8d36385d89ca15de1a43139134bc488c4f
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
STM32WBA5x have a single bank flash up to 1MB
Change-Id: I3d720e202f0fdd89ecd8aa7224653ca5a7ae187b
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@st.com>
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7694
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Recent commit 62f76b2169 ("flash/nor: add support for Nuvoton
NPCX4/K3 series flash") introduces a memory leak for a missing
free() on early return for an error.
Add the free() on the return path on error.
Change-Id: Ica8568a986802e23df2ab7bed4e8cc4bbb6305a5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: 62f76b2169 ("flash/nor: add support for Nuvoton NPCX4/K3 series flash")
Reviewed-on: https://review.openocd.org/c/openocd/+/7894
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
For ARMv8, add AArch64 mdd and mwd support. AArch32 not supported.
Change-Id: I25490471e16943e5a67d7649595d77643aa9a095
Signed-off-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7192
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
According to gdb documentation, `g` and `p` packets can report a
register being unavailable by a string of 'x' instead of register's
value.
Change-Id: I8ef279f1357c2e612f5d3290eb0022c1b47d9fa7
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7876
Reviewed-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Anatoly Parshintsev <kupokupokupopo@gmail.com>
Tested-by: jenkins
When the target isn't halted, simply return an error. This used to be
purely internal code so an assert was appropriate. Now after some
refactoring and with unavailable harts you could get here when the hart
is unavailable. In that case the right thing is simply to return an
error message.
Change-Id: I49d26a11fe7565c645fd2480e89a2c35ea9b1688
Signed-off-by: Tim Newsome <tim@sifive.com>
Previously, if a pin was configured as ADAPTER_GPIO_INIT_STATE_INPUT and
its drive value was ADAPTER_GPIO_DRIVE_MODE_PUSH_PULL, initialize_gpio
would configure the pin as an output.
The set_gpio_value function is optimized to not set the direction for
pins configured as ADAPTER_GPIO_DRIVE_MODE_PUSH_PULL as it only needs to
be set once. When initialize_gpio performs this setup, it checked only
that the drive value was ADAPTER_GPIO_DRIVE_MODE_PUSH_PULL to set the
output direction but did not exclude input pins which have already had
their direction set.
Now, input pins are ignored when initialize_gpio checks for
ADAPTER_GPIO_DRIVE_MODE_PUSH_PULL to set the mode to output.
Fixes: ace028262b ("drivers/am335xgpio: Migrate to adapter gpio commands")
Change-Id: I9ea502c400ea4ffae37080b9cee891ca9176a47d
Signed-off-by: Vincent Fazio <vfazio@xes-inc.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7877
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
Reviewed-by: Steve Marple <stevemarple@googlemail.com>
Previously, if the image file was less than 9 bytes long,
it was assumed to be an error when it could be a binary
image file. This patch makes OpenOCD detect these cases
as binary files.
Change-Id: I5b4dad2b547786246887812ac75907378fe58671
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7880
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Added NPCX flash driver to support the Nuvoton NPCX4/K3 series
microcontrollers. Add config file for these series.
Change-Id: I0b6e128fa51146b561f422e23a98260594b1f138
Signed-off-by: Luca Hung <YCHUNG0@nuvoton.com>
Signed-off-by: Mulin CHao <mlchao@nuvoton.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7794
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
This patch unifies the lines printed by the "bp" command
so that different types of breakpoints are printed in
the same format.
Change-Id: Ic1335eda1c58072a334aed9cf0011431c8ec86a4
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7861
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Now internal watch/breakpoint will not be removed in case
of error during removing triggers from hardware.
Also change signature of some functions (for deletion
bp/wp) to print message in case of some error.
Change-Id: I71cd1f556a33975005d0ee372fc384fddfddc3bf
Signed-off-by: Kirill Radkin <kirill.radkin@syntacore.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7738
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Previously, an unknown semihosting operation number
was logged as debug. This patch changes it and few
other places to be logged as error instead.
Change-Id: I83cae5ca1e3daed440f92b08bd372bfffbbad63c
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
This patch disables software breakpoints of size 2 for targets
which don't support compressed instructions.
Change-Id: I8200b22a51c97ba2aa89e6328beadde8dd35cdd5
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Previously, if a pin was configured as ADAPTER_GPIO_INIT_STATE_INPUT and
its drive value was ADAPTER_GPIO_DRIVE_MODE_PUSH_PULL, initialize_gpio
would configure the pin as an output.
The set_gpio_value function is optimized to not set the direction for
pins configured as ADAPTER_GPIO_DRIVE_MODE_PUSH_PULL as it only needs to
be set once. When initialize_gpio performs this setup, it checked only
that the drive value was ADAPTER_GPIO_DRIVE_MODE_PUSH_PULL to set the
output direction but did not exclude input pins which have already had
their direction set.
Now, input pins are ignored when initialize_gpio checks for
ADAPTER_GPIO_DRIVE_MODE_PUSH_PULL to set the mode to output.
Change-Id: I4fc7a8132a6b00c7f213ec9fd05c7bbb37ee5f20
Fixes: 0dd969d83b ("drivers/bcm2835gpio: Migrate to adapter gpio commands")
Signed-off-by: Brandon Pupp <bpupp@xes-inc.com>
[vfazio: update commit message]
Signed-off-by: Vincent Fazio <vfazio@xes-inc.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7862
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
add new i2c bit-banging feature, we can now connect in JTAG with the SoC
target and in i2c with the main board components at the same time.
Change-Id: I8e4516fe1ad5238e0373444f1c3c9bc0814d0f52
Signed-off-by: Ahmed BOUDJELIDA <aboudjelida@nanoxplore.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7796
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
add a line that checks the returned value of set signals function
add two VIDs of other original boards (have onboard angie architecture)
so angie driver can connect to them and change their VID after
renumeration.
Change-Id: Ide4f1f6f38168a410191bf3ff75bcd59dcf7ef50
Signed-off-by: Ahmed BOUDJELIDA <aboudjelida@nanoxplore.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7795
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Introduce the ability to detect CPUs based on CP0 PRId register and
apply cpu specific quirks, which alter the default ejtag behavior.
First of those is EJTAG_QUIRK_PAD_DRET, which makes sure extra NOPs are
placed after the DRET instruction on exit from debug mode. This fixes
resume behavior on Ingenic JZ4780 SoC.
The proper detection of some (currently unsupported) CPUs becomes quite
complicated, so please consult the following Linux kernel code when
adding new CPUs:
* arch/mips/include/asm/cpu.h
* arch/mips/kernel/cpu-probe.c
Change-Id: I0f413d5096cd43ef346b02cea85024985b7face6
Signed-off-by: Artur Rojek <contact@artur-rojek.eu>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/7859
Tested-by: jenkins
stlink v2 on Nucleo-64 board (e.g. NUCLEO-L476RG) has target SWO signal
connected to STM32F103CB'S PA10, which is UART1_RX. UART1 within this
MCU in theory can be configured to 4.5 Mbps baudrate, which means this
is the upper limit supported by HW. As a confirmation BMP (Black Magic
Probe) project also states in documentation that UART1 can be used with
up to 4.5 Mbps baudrate.
Tests have shown that configuring 4.5 Mbps baudrate on stlink v2
available on NUCLEO-L476RG board results in receiving corrupted data.
Using 2.25 Mbps however allows to successfully receive all data from
SWO. This makes sense in terms of STM32F103CB capabilities, since 2.25
Mbps is the next supported baudrate due to division by 2.
Increase supported stlink v2 SWO speed from 2 to 2.25 Mbps.
Tested with NUCLEO-L476RG:
$ stm32l4x.tpiu configure -protocol uart \
-traceclk 80000000 -pin-freq 2250000 \
-output /dev/stdout
$ stm32l4x.tpiu enable
2.25 Mbps speed confirmed with logic analyzer.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Change-Id: Icbec04585664aba8b217e8f9a75458e577f7617f
Reviewed-on: https://review.openocd.org/c/openocd/+/7848
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
This emulation mode supports software translation of an AP request
into an address mapped transaction that does not rely on physical AP
hardware. This is necessary in some hardware such as K3 SoCs since the
hardware architecture anticipates a potential race condition between
AP doing direct memory access generating transactions back to system
bus and firewalls that data path out.
This emulation mode allows direct memory driver to emulate CoreSight
Access Port (AP) and reuse the SoC configuration meant for JTAG
debuggers.
Since the address ranges are flat in nature, the requisite memory base
and size will need to be provided a-priori to the driver for mapping.
The other design alternative would be to map requested memory map for
every register operation, but, that would defeat our intent of getting
max debug performance.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Jason Peck <jpeck@ti.com>
Change-Id: I2d3c5f7833f1973e90b4f6b247827f62fc2905d0
Reviewed-on: https://review.openocd.org/c/openocd/+/7089
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Direct memory driver support for CoreSight Access Port(AP).
Even though we emulate SWD (serial wire debug), we aren't actually
using swd. Instead, we are using a direct memory access to get to the
register set. This is similar in approach to other fast access native
drivers such as am335xgpio drivers.
Example operation on Texas Instrument's AM62x K3 SoC:
+-----------+
| OpenOCD | SoC mem map
| on |--------------+
| Cortex-A53| |
+-----------+ |
|
+-----------+ +-----v-----+
|Cortex-M4F |<───────| |
+-----------+ | |
| DebugSS |
+-----------+ | |
|Cortex-M4F |<───────| |
+-----------+ +-----------+
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Jason Peck <jpeck@ti.com>
Change-Id: I8470cb15348863dd844b2c0e3f63a9063cb032c6
Reviewed-on: https://review.openocd.org/c/openocd/+/7088
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Since zephyrproject-rtos/zephyr@c3eeae8,
Zephyr OS exposes offset of mode_exc_return in the arch struct for ARM.
Accounting for this allows for consistency and enables
logic with further offsets that may be added after this.
Signed-off-by: Bruno Mendes <bd_mendes@outlook.com>
Change-Id: Id53ebd80c5d98a7d94eb6b00ad638ce51e719822
Reviewed-on: https://review.openocd.org/c/openocd/+/7851
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
These cores are advertised as M23 and M33 compatible, but are identified
by the Realtek implementor id. These cores are found on the RTL872xD
family, at least.
Raw CPUIDs:
Real-M200 (KM0): 721cd200
Real-M300 (KM4): 721fd220
Change-Id: I4106ccb7e8c562f98072a71e9e818f57999d664e
Signed-off-by: Karl Palsson <karlp@tweak.au>
Reviewed-on: https://review.openocd.org/c/openocd/+/7846
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Presently, we only look at the Part Number field of the CPUID, and
completely ignore the Implmentor field, simply assuming it to be ARM.
Parts have since been found, with different implementors, that use
overlapping part numbers, causing detection to fail.
Expand the "part number" field to be a full implementor+part number,
excluding the revision/patch fields, to make checking more reliable.
Change-Id: Id81774f829104f57a0c105320d0d2e479fa01522
Signed-off-by: Karl Palsson <karlp@tweak.au>
Reviewed-on: https://review.openocd.org/c/openocd/+/7845
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
There's really no reason to try and add an extra layer of cpu
verification here.
Change-Id: If8c4aa03754607be6c089f514ae300b09b067ffa
Signed-off-by: Karl Palsson <karlp@tweak.au>
Reviewed-on: https://review.openocd.org/c/openocd/+/7844
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
During a previous patch, the ignoring of writes to register zero
was deleted. This patch restores it to the original.
Change-Id: Ieb028a5b2e3f691e4847713c7bc809e10726e18c
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
This also fixes a bug when, after `examine` completion, the target still
has `unknown` status. To reproduce this one spike, it is enough to do
the following:
---
// make sure spike harts are halted
openocd ... -c init -c 'echo "[targets]"'
---
this behavior is quite dangerous and leads to segfaults in some cases
Change-Id: I13915f7038ad6d0251d56d2d519fbad9a2f13c18
Signed-off-by: Parshintsev Anatoly <anatoly.parshintsev@syntacore.com>
This patch improves the following issues:
1. Makes it compatible with targets with progbufsize == 1.
2. Although exceptions don’t update any registers, but do end execution
of the progbuf. This will make fence rw, rw impossible to execute.
Change-Id: I2208fd31ec6a7dae6e61c5952f90901568caada6
Signed-off-by: Xiang W <wxjstz@126.com>
The motivation for this refactor is to fixup error handling for some
corner cases. These functions attempt to cache S0 register and only then
perform a bunch of extra checks to figure out if the requested register
is valid one in this context. The problem is that there are few corner
cases when _*progbuf functions could receive a GPR as an input. For
example, an abstract read could fail (for whatever reason) leading to
infinite recursion:
````
save S0 -> read S0 -> save S0 -> read S0 -> ...
```
The case described above could be fixed by adding extra sanitity checks,
however I decided to make these functions more modular since I find
self-contained functions easier to read.
Change-Id: I01f57bf474ca45ebb67a30cd4d8fdef21f307c7d
Signed-off-by: Parshintsev Anatoly <anatoly.parshintsev@syntacore.com>
Use blocks (64 KiB) instead of sectors (4 KiB) when erasing the zd25Q16
SPI flash memory (thanks to Tomas Vanek!)
Change-Id: I969a69ad35f51b84eb3e11b93f0d79db3e98613a
Signed-off-by: Nikolay Dimitrov <nikolay.dimitrov@retrohub.org>
Reviewed-on: https://review.openocd.org/c/openocd/+/7850
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
Add missing aarch64_poll() calls to ensure the event
TARGET_EVENT_HALTED is called when necessary.
This is needed with the poller update introduced in commit
95603fae18 ("openocd: revert workarounds for 'expr' syntax change")
Signed-off-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
Change-Id: I6e91f1b6bc1f0d16e6f0eb76fc67d20111e3afd2
Reviewed-on: https://review.openocd.org/c/openocd/+/7737
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
This is the driver code for NanoXplore's ANGIE USB-JTAG Adapter.
The driver is based on the openULINK project.
This driver communicate with ANGIE's firmware in order to establish
JTAG protocol to debug the target chip.
Since the ANGIE Adapter has a Spartan-6 FPGA in addition to the
FX2 microcontroller, the driver adds two functions, one to download
the firmware (embedded C) to the FX2, and the second to program
the FPGA with its bitstream.
Add ANGIE's configuration file to tcl/interface/
Add the device VID/PID to 60-openocd.rules file.
Add ANGIE to OpenOCD's documentation
Change-Id: Id17111c74073da01450d43d466e11b0cc086691f
Signed-off-by: Ahmed BOUDJELIDA <aboudjelida@nanoxplore.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7702
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
The USB control transfer can be executed without any data.
The libusb API libusb_control_transfer() can thus be called with
zero 'size', thus returning zero byte transferred when succeed.
The OpenOCD API jtag_libusb_control_transfer() returns zero either
in case of transfer error and in case of libusb_control_transfer()
returning zero, making impossible discriminating the two cases.
Extend jtag_libusb_control_transfer() with separate return value
for error code and explicit parameter's pointer for transferred
bytes.
Make the transferred pointer optional, as many callers do not
properly handle the returned value.
Use 'int' type pointer for transferred, instead of the 'uint16_t'
that would have matched the type of 'size'. This can simplify the
caller's code by using a single 'int transferred' variable shared
with other jtag_libusb_bulk_read|write, while keeping possible the
comparison int vs uint16_t without cast.
This change is inspired from commit d612baacaa
("jtag_libusb_bulk_read|write: return error code instead of size")
Change-Id: I14d9bff3e845675be03465c307a136e69eebc317
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7756
Tested-by: jenkins
Reviewed-by: ahmed BOUDJELIDA <aboudjelida@nanoxplore.com>
This patch changes data types of watchpoint value and mask to allow for
64-bit values match that some architectures (like RISCV) allow.
In addition this patch fixes the behavior of watchpoint command to
zero-out mask if only data value is provided.
Change-Id: I3c7ec1630f03ea9534ec34c0ebe99e08ea56e7f0
Signed-off-by: Parshintsev Anatoly <anatoly.parshintsev@syntacore.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7840
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Marek Vrbka <marek.vrbka@codasip.com>
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
register_cache_invalidate() is written a way which uses
pointer arithmetic, which makes it harder to read. This patch
replaces it with more readable way to iterate over array of
structs.
Change-Id: Ia420f70a3bb6998c690c8c600c71301dca9f9dbf
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7735
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
OpenOCD fails in the presence of inactive/unresponsive cores
I faced with case when inactive core returns 0 while reading dtmcontrol.
This leads to failure on assert: "addrbits != 0" in "dbus_scan".
Also change "read_bits","poll_target" funcs to avoid a lot lines in logs
Change-Id: If852126755317789602b7372c5c5732183fff6c5
Signed-off-by: Kirill Radkin <kirill.radkin@syntacore.com>
Lot of messages was logged as LOG_WARNING, but the operation failed
immediately. Sometimes no error message was logged at all.
Add missing messages, change warnings to errors.
Sometimes ERROR_TARGET_INVALID was returned. Some command handlers
returned ERROR_OK! Always return ERROR_TARGET_NOT_HALTED.
While on it use LOG_TARGET_ERROR() whenever possible.
Prefix command_print() message with 'Error:' to get closer
to LOG_TARGET_ERROR() variant.
Error message was not added to get() and set() methods of
struct xxx_reg_type - the return value is properly checked and a message
is logged by the caller in case of ERROR_TARGET_NOT_HALTED.
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Change-Id: I2fe4187c6025f0038956ab387edbf3f461c69398
Reviewed-on: https://review.openocd.org/c/openocd/+/7819
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Support assign DMI address of the debug module by pass
-dbgbase to the target create command
Change-Id: I774c3746567f6e6d77c43a62dea5e9e67bb25770
Signed-off-by: Mark Zhuang <mark.zhuang@spacemit.com>
Compiler would complain that `written` was used without being
initialized.
Simplify the code a little. The number of bytes written is already
checked in usb_write().
Signed-off-by: Tim Newsome <tim@sifive.com>
Change-Id: Ibada85dcccfca6f1269c584cdbc4f2e3b93bb8f3
Reviewed-on: https://review.openocd.org/c/openocd/+/7813
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
This patch adds target logging to logging instances where it makes sense.
This is especially useful when debugging multiple targets at once,
such as multicore systems.
Change-Id: Ia9861f3fa0e6e5908b683c2a8280659c3c264395
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
While not affecting the function's main purpose, an error has
crept into arc_save_context() that results in logging wrong register
values when the debug level is 3 or more. For instance, when debugging a
trivial program and halting at entry to main, the following values are
printed to the log:
Debug: 2915 2020 arc.c:894 arc_save_context(): Get core register regnum=0,
name=r0, value=0x0000000
...
Debug: 2947 2020 arc.c:894 arc_save_context(): Get core register regnum=60,
name=lp_count, value=0x900002d8
Debug: 2948 2020 arc.c:894 arc_save_context(): Get core register regnum=63,
name=pcl, value=0xffffffff
Debug: 2949 2020 arc.c:909 arc_save_context(): Get aux register regnum=64,
name=pc, value=0x900000b4
Debug: 2950 2020 arc.c:909 arc_save_context(): Get aux register regnum=65,
name=lp_start, value=0x900000bc
Debug: 2951 2020 arc.c:909 arc_save_context(): Get aux register regnum=66,
name=lp_end, value=0x00080801
Debug: 2952 2020 arc.c:909 arc_save_context(): Get aux register regnum=67,
name=status32, value=0xffffffff
After the change, the register contents make much more sense:
Debug: 2923 3934 arc.c:889 arc_save_context(): Get core register regnum=0,
name=r0, value=0x00000000
...
Debug: 2955 3934 arc.c:889 arc_save_context(): Get core register regnum=60,
name=lp_count, value=0x00000000
Debug: 2956 3934 arc.c:889 arc_save_context(): Get core register regnum=63,
name=pcl, value=0x900002d8
Debug: 2957 3934 arc.c:903 arc_save_context(): Get aux register regnum=64,
name=pc, value=0x900002da
Debug: 2958 3934 arc.c:903 arc_save_context(): Get aux register regnum=65,
name=lp_start, value=0x900000b4
Debug: 2959 3934 arc.c:903 arc_save_context(): Get aux register regnum=66,
name=lp_end, value=0x900000bc
Debug: 2960 3934 arc.c:903 arc_save_context(): Get aux register regnum=67,
name=status32, value=0x00080801
While at it, simplify a couple of expressions.
Change-Id: I8f2d79404707fbac4503af45b393ea73f91e6beb
Signed-off-by: Artemiy Volkov <artemiy@synopsys.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7765
Tested-by: jenkins
Reviewed-by: Evgeniy Didin <didin@synopsys.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Besides checkpatch, now upstream codes are scanning with
Sparse semantic checker tool.
This commit addresses some Sparse and checkpatch warnings.
Change-Id: I0e3e9f15220d8829c5708897af27aa86a8f90c07
Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Below warnings are fixed.
1- A function declaration without a prototype is deprecated in all
versions of C [-Werror,-Wstrict-prototypes]
2- error: variable set but not used [-Werror,-Wunused-but-set-variable]
Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: I1cf14b8e5e3e732ebc9cacc4b1cb9009276a8ea9
Reviewed-on: https://review.openocd.org/c/openocd/+/7569
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
* Add a warning when eq trigger is setup and it's behavior is different
from other triggers.
* Make eq trigger's behavior consistent with other triggers in case of
length == 1.
* Fix a bug in setting chained triggers (LT, GT case).
* Improve logging.
Change-Id: Id1ed0d11971b8ed875afbb979e6c8a8b51dd3818
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
There were a couple of problems with previous implementation:
* Misalligned read would return ERROR_OK and print all zeroes.
* CMDERR_BUSY for abstract access was improperly handled:
According to the spec, no assumptions can be made about DM_DATA*
contents in such a case, but these were considered valid values from
memory.
* A fallback to one element read was implemented when DMI_STATUS_BUSY
occurred during batch reads, even though this can be accounted for.
Change-Id: I09174c61c951b2bb97a529b7f0aa5afaa995179b
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
Memory region addresses are not in use for now.
Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: I9a2189e956ae59b56245ec914ab16719df857b2d
Reviewed-on: https://review.openocd.org/c/openocd/+/7762
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Right after target halt, some activities needs to be done
such as printing exception reason, disable wdts and reading
debug stubs information.
Missing activities will be submitted in the next patches.
Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: I27aad5614d903f4bd7c8d6dba6bfb0bdb93ed8dc
Reviewed-on: https://review.openocd.org/c/openocd/+/7757
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
See section 57.6.1 in RM0432.
Change-Id: Ic4977aee74d1838f420c1d9ff19925d09f8f6e2b
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/7763
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
1. update RISCV_MAX_HARTS to 2^20 according to SPEC
2. remove RISCV_MAX_REGISTERS, it's not used anywhere anymore
3. add parentheses
Change-Id: Iadf0fa1ba3bbe5b9420b8430883e140db87f4f9e
Signed-off-by: Mark Zhuang <mark.zhuang@spacemit.com>
If a target where a software breakpoint was set is not currently
available, but there are other targets in the same SMP group that are
available, then we can use those to remove the software breakpoint.
Change-Id: I9faa427c7b3aee31504e6e6599539e6f29b58d8f
Signed-off-by: Tim Newsome <tim@sifive.com>
STLINK-V3PWR is both a standalone debugger probe compatible with
STLINK-V3 and a source measurement unit (SMU).
Link: http://www.st.com/stlink-v3pwr
This code adds support for the debugger probe functionality.
Change-Id: Ib056e55722528f922c5574bb6fbf77e2f2b2b0c1
Signed-off-by: Laurent LEMELE <laurent.lemele@st.com>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7755
Tested-by: jenkins
To start a ipdbg server one needs to know the tap and the
instruction code to reach the IPDBG-Hub. This instruction is
vendor/family specific. Knowledge which can be provided by the
pld driver.
Change-Id: I13eeb9fee895d65cd48544da4704fcc9b528b869
Signed-off-by: Daniel Anselmi <danselmi@gmx.ch>
Reviewed-on: https://review.openocd.org/c/openocd/+/7369
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
According to section 5.6 in the RISC-V debug specification, the previous
way to set triggers was incorrect, as was discussed as part of
https://github.com/riscv/riscv-openocd/issues/870. This commit fixes the
sequence to be in line with the specification as well as adds some comments
to clarify for any future reader as to what is actually done.
Change-Id: Iffc5cc0f866a466a7aaa72a4c53ee95c9080ac9d
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
this functionality allows to query if a target belongs to some smp group
and to dynamically turn on/off smp-specific behavior
Change-Id: I469453d95e7c1640a91bc60d80c854404e508535
Signed-off-by: Parshintsev Anatoly <anatoly.parshintsev@syntacore.com>
This patch fixes the handling of errno by setting the sys_errn
only if error has actually occurred during the semihosting call.
It also fixes few issues where error was not set in the first place.
Change-Id: I2fbe562f3ec5e6220b800de04cd33aa1f409c7a0
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7730
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
This patch introduces function semihosting_opcode_to_str() which
converts semihosting opcodes to strings. This function is then
used in debug messages to improve log analysis and troubleshooting.
Change-Id: Iffea49dae13d6a626ae0db40d379cba3c9ea5bd3
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7726
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
* rtos/FreeRTOS: solve some conflicting usage of thread id.
1.
There are some RISCV-specific usage of thread_id, which has conflict with upstream.
Some adaptions are made in this patch, to make sure OpenOCD is sending a clear thread list to gdb.
2.
Use freertos_read_struct_value for xSchedulerRunning.
Change-Id: I001a88a0c6d8eac98a389c0217b4897f28124840
Signed-off-by: Chao Du <duchao@eswincomputing.com>
* fix typo.
Change-Id: Id6546cc74de44bbee7e44b7cb29b769a2f35ec4a
* correct the data type.
Change-Id: I28c7e111e569d94ba5f6e1ae21745ddb34d4dd12
* changes as per the review comment.
Change-Id: Ica4c705a8f2657700dc27e24790287ca802480fd
* another macro replacement.
Change-Id: Ia9330fed32d917cf87804051ba1b8d6ac42cfb7b
---------
Signed-off-by: Chao Du <duchao@eswincomputing.com>
With this change, failures to resume a hart due to it not being halted
are more explicitly logged or reported as an error.
Change-Id: Ia55d8df85a908363d0f2140637ce1e47c1ab6251
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
This involves halting the target, which might have unintended side
effects, but when the debugger is connected software breakpoints must
trap to the debugger. Anything else is a terrible user experience.
Change-Id: I1f7bb610eeeb054cc3042dc6bcfc16589ce12a31
Signed-off-by: Tim Newsome <tim@sifive.com>
Intended as a place where we can interact with the target without too
much concern about preserving state and doing exactly the right thing
while poll() is going on.
Change-Id: Ic9bd441caae85901a131fd45e742599803df89b5
Signed-off-by: Tim Newsome <tim@sifive.com>
Specifically, call into the RISC-V version when target becomes halted,
running, or unavailable.
I'll be using unavailable shortly.
Change-Id: I9ffffdccbf22e053fe6390d656b362bf9ab9559a
Signed-off-by: Tim Newsome <tim@sifive.com>
Will be used later when we want to do a quick halt/resume.
Change-Id: Ib80166234c4c277b7d9ce26b7566ac0f93017e64
Signed-off-by: Tim Newsome <tim@sifive.com>
* Only set ebreak bits that might be supported based on misa.
* Don't write dcsr if its value wouldn't change.
Change-Id: I7087af0b0df0fbdbf994373b5c887b9b389df872
Signed-off-by: Tim Newsome <tim@sifive.com>
Make it callable earlier, handle `supported` being NULL, and make enum
names more clear.
Change-Id: If4d286b54ccfc01eb5de5a57eb18f748c920e979
Signed-off-by: Tim Newsome <tim@sifive.com>
The riscv013_on_halt function was being called but its implementation was
empty, providing no additional functionality. Removed the function declaration,
calls to it, and its implementation since it is not required.
Change-Id: I425ea890deadeec945f0a47af247f3f99172e801
Signed-off-by: Tim Newsome <tim@sifive.com>
Otherwise I get a compiler warning, which fails the build.
Change-Id: Ib7d4ab85160b537d07c74f8651ac42906fd661ed
Signed-off-by: Tim Newsome <tim@sifive.com>
When halted we don't need to read all 3 instructions before deciding the
sequence doesn't match.
Change-Id: I9f8345960ce27e859265af901a368166a70b9fde
Signed-off-by: Tim Newsome <tim@sifive.com>
* rtos/FreeRTOS: pxCurrentTCB should be used for judgment.
The current TCB is stored in pxCurrentTCB, which is somehow RISC-V-specific, should not be overwritten from upstream (#816).
* fix the code style check.
Signed-off-by: Chao Du <duchao@eswincomputing.com>
Change-Id: I9ffa8947f0cb9e93c7d96866882a5a1e8e69afad
* revert some over-changes in last commit.
Change-Id: Ie88bd75b59190503db11ee4538281bd13b554e50
Signed-off-by: Chao Du <duchao@eswincomputing.com>
---------
Signed-off-by: Chao Du <duchao@eswincomputing.com>
The original document from Jedec does not report the entry for
"21 NXP (Philips)", replaced by "c". It's clearly a typo.
Keep the line from JEP106BF.01 for "NXP (Philips)".
Change-Id: I30215c4ff08d5f112305cde6ab7a3176cdcef948
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7727
Tested-by: jenkins
On Windows, isatty() can return any non-zero value if it's an interactive
device. Which diverges from the ARM semihosting specification. This patch
introduces a fix to make the SYS_ISTTY operation conform to spec.
Change-Id: I9bc4f3cb82370812825d52419851910b3e3f35cc
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7725
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
The old implementation of gdb socket error handling
in the gdb_get_char_inner() differs between Windows and *nix
platforms. This patch simplifies it by using an existing
function log_socket_error() which handles most of the platform
specific things. It also provides better error messages.
Change-Id: Iec871c4965b116dc7cfb03c3565bab66c8b41958
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7724
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Added debug prints to show what is the target debug reason. Also added
debug print for Ctrl-C response. This is useful for troubleshooting and
log analysis.
Change-Id: I055936257d989efe7255656198a8d73a367fcd15
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7720
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
This patch adds support for the NXP QN908x family of Bluetooth
microcontrollers, such as the QN9080. This chip features a Cortex-M4F
with 512 KiB of flash on all the available versions, although the
documentation suggests that there might be 256 kB versions as well.
The initial support allows to read, erase and write the whole user flash
area. Three new sub-commands under the new "qn908x" command are added
in this patch as well: disable_wdog to disabled the watchdog,
mass_erase to perform a mass erase and allow_brick to allow programming
images that disable the SWD interface.
Disabling the watchdog is required after a "reset halt" in order to run
the CRC algorithm from RAM when verifying the chip. However, this is not
done automatically on probing or other initialization since disabling
the watchdog might interfere with debugging real applications.
The "mass_erase" command allows to erase the whole flash without
probing it, since in some scenarios the chip can be locked such that no
flash or ram can be accessed from the SWD interface, allowing only to
run a mass_erase to be able to flash the program.
The flashing process allows to compute a checksum, similar to the
lpc2000 driver "calc_checksum" but done over a different region of the
memory. This checksum is required to be present for the QN908x
bootloader ROM to boot, and otherwise is useless. As with the lpc2000
design, verification when using "calc_checksum" is expected to fail if
the checksum was not valid in the image being verified.
This was manually tested on a QN9080, including the scan-view,
AddressSanitizer/UBSan and test coverage configurations.
Change-Id: Ibd6d8f3608654294795085fcaaffb448b77cc58b
Co-developed-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>
Signed-off-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>
Signed-off-by: iosabi <iosabi@protonmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/5584
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
These functions used to exist but don't anymore. (Pointed out in #863)
Change-Id: Iac6b5edd320bdff7628a788861e332f956dcd93d
Signed-off-by: Tim Newsome <tim@sifive.com>
Previously, progbuf execution did not flush or invalidate the register cache which could lead to incorrect behavior. This patch fixes it as well as refactors few sore points in the code related to it.
Change-Id: I353b931ca70a1828d4a9cc512aead00441730875
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Otherwise we may end up modifying DCSR of a different hart than
intended.
Change-Id: I39bde21a1444623ed150f2b3d504b9318b9d6191
Signed-off-by: Tim Newsome <tim@sifive.com>
This change implements the predefined type tap_state instead of generic
uint8_t in the driver
Change-Id: I3478e8d7b40b961f3ba77711179016cdcc35cd32
Signed-off-by: Jacek Wuwer <jacekmw8@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7722
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Tim Newsome
Kirill Radkin
Jan Matyas
Tomas Vanek
Evgeniy Naydanov
EasyDevKits
Walter Ji
Parshintsev Anatoly
Marek Vrbka
Florian Fainelli
Artemiy Volkov
Antonio Borneo
liangzhen
Ahmed Boughanmi
Vincent Fazio
Daniel Anselmi
Tarek BOCHKATI
Fedi Bouzazi
Daniel Goehring
Luca Hung
Brandon Pupp
Ahmed BOUDJELIDA
Artur Rojek
Marcin Niestroj
Jason Peck
Nishanth Menon
Bruno Mendes
Karl Palsson
Xiang W
Nikolay Dimitrov
Mark Zhuang
eolson
Erhan Kurubas
Marc Schink
Laurent LEMELE
Chao Du
iosabi
Jacek Wuwer