jtagspi/pld: add interface to get support from pld drivers
Jtagspi is using a proxy bitstream to "connect" JTAG to the SPI pins. This is not possible with all FPGA vendors/families. In this cases a dedicated procedure is needed to establish such a connection. This patch adds a jtagspi-mode for these cases. It also adds the needed interfaces to jtagspi and the pld-driver so the driver can select the mode and provide the necessary procedures. For the cases where a proxy bitstream is needed, the pld driver will select the mode and provide instruction code needed in this case. Change-Id: I9563f26739589157b39a3664a73d91152cd13f77 Signed-off-by: Daniel Anselmi <danselmi@gmx.ch> Reviewed-on: https://review.openocd.org/c/openocd/+/7822 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
This commit is contained in:
Daniel Anselmi
Antonio Borneo
parent
30375c6439
commit
fe5ed48f40
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@ -5900,24 +5900,42 @@ flash bank $_FLASHNAME cfi 0x00000000 0x02000000 2 4 $_TARGETNAME
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@c "cfi part_id" disabled
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@end deffn
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@anchor{jtagspi}
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@deffn {Flash Driver} {jtagspi}
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@cindex Generic JTAG2SPI driver
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@cindex SPI
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@cindex jtagspi
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@cindex bscan_spi
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Several FPGAs and CPLDs can retrieve their configuration (bitstream) from a
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SPI flash connected to them. To access this flash from the host, the device
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is first programmed with a special proxy bitstream that
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exposes the SPI flash on the device's JTAG interface. The flash can then be
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accessed through JTAG.
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SPI flash connected to them. To access this flash from the host, some FPGA
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device provides dedicated JTAG instructions, while other FPGA devices should
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be programmed with a special proxy bitstream that exposes the SPI flash on
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the device's JTAG interface. The flash can then be accessed through JTAG.
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Since signaling between JTAG and SPI is compatible, all that is required for
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Since signalling between JTAG and SPI is compatible, all that is required for
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a proxy bitstream is to connect TDI-MOSI, TDO-MISO, TCK-CLK and activate
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the flash chip select when the JTAG state machine is in SHIFT-DR. Such
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a bitstream for several Xilinx FPGAs can be found in
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the flash chip select when the JTAG state machine is in SHIFT-DR.
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Such a bitstream for several Xilinx FPGAs can be found in
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@file{contrib/loaders/flash/fpga/xilinx_bscan_spi.py}. It requires
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@uref{https://github.com/m-labs/migen, migen} and a Xilinx toolchain to build.
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This mechanism with a proxy bitstream can also be used for FPGAs from Intel and
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Efinix. FPGAs from Lattice and Cologne Chip have dedicated JTAG instructions
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and procedure to connect the JTAG to the SPI signals and don't need a proxy
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bitstream. Support for these devices with dedicated procedure is provided by
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the pld drivers. For convenience the PLD drivers will provide the USERx code
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for FPGAs with a proxy bitstream. Currently the following PLD drivers are able
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to support jtagspi:
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@itemize
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@item Efinix: proxy-bitstream
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@item Gatemate: dedicated procedure
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@item Intel/Altera: proxy-bitstream
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@item Lattice: dedicated procedure supporting ECP2, ECP3, ECP5, Certus and Certus Pro devices
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@item AMD/Xilinx: proxy-bitstream
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@end itemize
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This flash bank driver requires a target on a JTAG tap and will access that
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tap directly. Since no support from the target is needed, the target can be a
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"testee" dummy. Since the target does not expose the flash memory
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@ -5935,14 +5953,25 @@ command, see below.
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@item @var{ir} ... is loaded into the JTAG IR to map the flash as the JTAG DR.
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For the bitstreams generated from @file{xilinx_bscan_spi.py} this is the
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@var{USER1} instruction.
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@end itemize
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@example
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target create $_TARGETNAME testee -chain-position $_CHIPNAME.tap
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set _USER1_INSTR_CODE 0x02
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flash bank $_FLASHNAME jtagspi 0x0 0 0 0 \
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$_TARGETNAME $_USER1_INSTR_CODE
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@end example
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@item The option @option{-pld} @var{name} is used to have support from the
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PLD driver of pld device @var{name}. The name is the name of the pld device
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given during creation of the pld device.
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Pld device names are shown by the @command{pld devices} command.
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@example
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target create $_TARGETNAME testee -chain-position $_CHIPNAME.fpga
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set _XILINX_USER1 0x02
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flash bank $_FLASHNAME spi 0x0 0 0 0 \
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$_TARGETNAME $_XILINX_USER1
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target create $_TARGETNAME testee -chain-position $_CHIPNAME.tap
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set _JTAGSPI_CHAIN_ID $_CHIPNAME.pld
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flash bank $_FLASHNAME jtagspi 0x0 0 0 0 \
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$_TARGETNAME -pld $_JTAGSPI_CHAIN_ID
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@end example
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@end itemize
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@deffn Command {jtagspi set} bank_id name total_size page_size read_cmd unused pprg_cmd mass_erase_cmd sector_size sector_erase_cmd
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Sets flash parameters: @var{name} human readable string, @var{total_size}
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@ -8668,7 +8697,8 @@ Accordingly, both are called PLDs here.
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As it does for JTAG TAPs, debug targets, and flash chips (both NOR and NAND),
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OpenOCD maintains a list of PLDs available for use in various commands.
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Also, each such PLD requires a driver.
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Also, each such PLD requires a driver. PLD drivers may also be needed to program
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SPI flash connected to the FPGA to store the bitstream (@xref{jtagspi} for details).
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They are referenced by the name which was given when the pld was created or
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the number shown by the @command{pld devices} command.
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@ -12,6 +12,7 @@
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#include <jtag/jtag.h>
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#include <flash/nor/spi.h>
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#include <helper/time_support.h>
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#include <pld/pld.h>
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#define JTAGSPI_MAX_TIMEOUT 3000
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@ -21,19 +22,44 @@ struct jtagspi_flash_bank {
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struct flash_device dev;
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char devname[32];
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bool probed;
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bool always_4byte; /* use always 4-byte address except for basic read 0x03 */
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uint32_t ir;
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unsigned int addr_len; /* address length in bytes */
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bool always_4byte; /* use always 4-byte address except for basic read 0x03 */
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unsigned int addr_len; /* address length in bytes */
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struct pld_device *pld_device; /* if not NULL, the PLD has special instructions for JTAGSPI */
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uint32_t ir; /* when !pld_device, this instruction code is used in
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jtagspi_set_user_ir to connect through a proxy bitstream */
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};
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FLASH_BANK_COMMAND_HANDLER(jtagspi_flash_bank_command)
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{
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struct jtagspi_flash_bank *info;
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if (CMD_ARGC < 7)
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return ERROR_COMMAND_SYNTAX_ERROR;
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info = malloc(sizeof(struct jtagspi_flash_bank));
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unsigned int ir = 0;
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struct pld_device *device = NULL;
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if (strcmp(CMD_ARGV[6], "-pld") == 0) {
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if (CMD_ARGC < 8)
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return ERROR_COMMAND_SYNTAX_ERROR;
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device = get_pld_device_by_name_or_numstr(CMD_ARGV[7]);
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if (device) {
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bool has_jtagspi_instruction = false;
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int retval = pld_has_jtagspi_instruction(device, &has_jtagspi_instruction);
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if (retval != ERROR_OK)
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return retval;
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if (!has_jtagspi_instruction) {
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retval = pld_get_jtagspi_userircode(device, &ir);
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if (retval != ERROR_OK)
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return retval;
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device = NULL;
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}
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} else {
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LOG_ERROR("pld device '#%s' is out of bounds or unknown", CMD_ARGV[7]);
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return ERROR_FAIL;
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}
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} else {
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COMMAND_PARSE_NUMBER(uint, CMD_ARGV[6], ir);
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}
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struct jtagspi_flash_bank *info = calloc(1, sizeof(struct jtagspi_flash_bank));
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if (!info) {
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LOG_ERROR("no memory for flash bank info");
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return ERROR_FAIL;
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@ -47,18 +73,19 @@ FLASH_BANK_COMMAND_HANDLER(jtagspi_flash_bank_command)
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}
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info->tap = bank->target->tap;
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info->probed = false;
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COMMAND_PARSE_NUMBER(u32, CMD_ARGV[6], info->ir);
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info->ir = ir;
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info->pld_device = device;
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return ERROR_OK;
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}
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static void jtagspi_set_ir(struct flash_bank *bank)
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static void jtagspi_set_user_ir(struct jtagspi_flash_bank *info)
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{
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struct jtagspi_flash_bank *info = bank->driver_priv;
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struct scan_field field;
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uint8_t buf[4] = { 0 };
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LOG_DEBUG("loading jtagspi ir");
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LOG_DEBUG("loading jtagspi ir(0x%" PRIx32 ")", info->ir);
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buf_set_u32(buf, 0, info->tap->ir_length, info->ir);
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field.num_bits = info->tap->ir_length;
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field.out_value = buf;
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@ -79,6 +106,7 @@ static int jtagspi_cmd(struct flash_bank *bank, uint8_t cmd,
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assert(data_buffer || data_len == 0);
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struct scan_field fields[6];
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struct jtagspi_flash_bank *info = bank->driver_priv;
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LOG_DEBUG("cmd=0x%02x write_len=%d data_len=%d", cmd, write_len, data_len);
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@ -87,22 +115,34 @@ static int jtagspi_cmd(struct flash_bank *bank, uint8_t cmd,
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if (is_read)
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data_len = -data_len;
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unsigned int facing_read_bits = 0;
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unsigned int trailing_write_bits = 0;
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if (info->pld_device) {
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int retval = pld_get_jtagspi_stuff_bits(info->pld_device, &facing_read_bits, &trailing_write_bits);
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if (retval != ERROR_OK)
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return retval;
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}
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int n = 0;
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const uint8_t marker = 1;
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fields[n].num_bits = 1;
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fields[n].out_value = ▮
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fields[n].in_value = NULL;
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n++;
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/* transfer length = cmd + address + read/write,
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* -1 due to the counter implementation */
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uint8_t xfer_bits[4];
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h_u32_to_be(xfer_bits, ((sizeof(cmd) + write_len + data_len) * CHAR_BIT) - 1);
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flip_u8(xfer_bits, xfer_bits, sizeof(xfer_bits));
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fields[n].num_bits = sizeof(xfer_bits) * CHAR_BIT;
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fields[n].out_value = xfer_bits;
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fields[n].in_value = NULL;
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n++;
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if (!info->pld_device) { /* mode == JTAGSPI_MODE_PROXY_BITSTREAM */
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facing_read_bits = jtag_tap_count_enabled();
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fields[n].num_bits = 1;
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fields[n].out_value = ▮
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fields[n].in_value = NULL;
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n++;
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/* transfer length = cmd + address + read/write,
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* -1 due to the counter implementation */
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h_u32_to_be(xfer_bits, ((sizeof(cmd) + write_len + data_len) * CHAR_BIT) - 1);
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flip_u8(xfer_bits, xfer_bits, sizeof(xfer_bits));
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fields[n].num_bits = sizeof(xfer_bits) * CHAR_BIT;
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fields[n].out_value = xfer_bits;
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fields[n].in_value = NULL;
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n++;
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}
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flip_u8(&cmd, &cmd, sizeof(cmd));
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fields[n].num_bits = sizeof(cmd) * CHAR_BIT;
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@ -120,10 +160,12 @@ static int jtagspi_cmd(struct flash_bank *bank, uint8_t cmd,
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if (data_len > 0) {
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if (is_read) {
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fields[n].num_bits = jtag_tap_count_enabled();
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fields[n].out_value = NULL;
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fields[n].in_value = NULL;
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n++;
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if (facing_read_bits) {
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fields[n].num_bits = facing_read_bits;
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fields[n].out_value = NULL;
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fields[n].in_value = NULL;
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n++;
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}
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fields[n].out_value = NULL;
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fields[n].in_value = data_buffer;
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@ -135,16 +177,33 @@ static int jtagspi_cmd(struct flash_bank *bank, uint8_t cmd,
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fields[n].num_bits = data_len * CHAR_BIT;
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n++;
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}
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if (!is_read && trailing_write_bits) {
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fields[n].num_bits = trailing_write_bits;
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fields[n].out_value = NULL;
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fields[n].in_value = NULL;
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n++;
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}
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if (info->pld_device) {
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int retval = pld_connect_spi_to_jtag(info->pld_device);
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if (retval != ERROR_OK)
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return retval;
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} else {
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jtagspi_set_user_ir(info);
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}
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jtagspi_set_ir(bank);
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/* passing from an IR scan to SHIFT-DR clears BYPASS registers */
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struct jtagspi_flash_bank *info = bank->driver_priv;
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jtag_add_dr_scan(info->tap, n, fields, TAP_IDLE);
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int retval = jtag_execute_queue();
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if (retval != ERROR_OK)
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return retval;
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if (is_read)
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flip_u8(data_buffer, data_buffer, data_len);
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return retval;
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if (info->pld_device)
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return pld_disconnect_spi_from_jtag(info->pld_device);
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return ERROR_OK;
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}
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COMMAND_HANDLER(jtagspi_handle_set)
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@ -69,8 +69,95 @@ struct pld_device *get_pld_device_by_name_or_numstr(const char *str)
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return get_pld_device_by_num(dev_num);
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}
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/* @deffn {Config Command} {pld create} pld_name driver -chain-position tap_name [options]
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*/
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int pld_has_jtagspi_instruction(struct pld_device *pld_device, bool *has_instruction)
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{
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*has_instruction = false; /* default is using a proxy bitstream */
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if (!pld_device)
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return ERROR_FAIL;
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struct pld_driver *pld_driver = pld_device->driver;
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if (!pld_driver) {
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LOG_ERROR("pld device has no associated driver");
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return ERROR_FAIL;
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}
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if (pld_driver->has_jtagspi_instruction)
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return pld_driver->has_jtagspi_instruction(pld_device, has_instruction);
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/* else, take the default (proxy bitstream) */
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return ERROR_OK;
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}
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int pld_get_jtagspi_userircode(struct pld_device *pld_device, unsigned int *ir)
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{
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if (!pld_device)
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return ERROR_FAIL;
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struct pld_driver *pld_driver = pld_device->driver;
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if (!pld_driver) {
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LOG_ERROR("pld device has no associated driver");
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return ERROR_FAIL;
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}
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if (pld_driver->get_jtagspi_userircode)
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return pld_driver->get_jtagspi_userircode(pld_device, ir);
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return ERROR_FAIL;
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}
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int pld_get_jtagspi_stuff_bits(struct pld_device *pld_device, unsigned int *facing_read_bits,
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unsigned int *trailing_write_bits)
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{
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if (!pld_device)
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return ERROR_FAIL;
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struct pld_driver *pld_driver = pld_device->driver;
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if (!pld_driver) {
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LOG_ERROR("pld device has no associated driver");
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return ERROR_FAIL;
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}
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if (pld_driver->get_stuff_bits)
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return pld_driver->get_stuff_bits(pld_device, facing_read_bits, trailing_write_bits);
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return ERROR_OK;
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}
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int pld_connect_spi_to_jtag(struct pld_device *pld_device)
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{
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if (!pld_device)
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return ERROR_FAIL;
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struct pld_driver *pld_driver = pld_device->driver;
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if (!pld_driver) {
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LOG_ERROR("pld device has no associated driver");
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return ERROR_FAIL;
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}
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if (pld_driver->connect_spi_to_jtag)
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return pld_driver->connect_spi_to_jtag(pld_device);
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return ERROR_FAIL;
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}
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int pld_disconnect_spi_from_jtag(struct pld_device *pld_device)
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{
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if (!pld_device)
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return ERROR_FAIL;
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struct pld_driver *pld_driver = pld_device->driver;
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if (!pld_driver) {
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LOG_ERROR("pld device has no associated driver");
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return ERROR_FAIL;
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}
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if (pld_driver->disconnect_spi_from_jtag)
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return pld_driver->disconnect_spi_from_jtag(pld_device);
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return ERROR_FAIL;
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}
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COMMAND_HANDLER(handle_pld_create_command)
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{
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if (CMD_ARGC < 2)
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@ -20,12 +20,26 @@ struct pld_ipdbg_hub {
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unsigned int user_ir_code;
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};
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int pld_has_jtagspi_instruction(struct pld_device *device, bool *has_instruction);
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int pld_get_jtagspi_userircode(struct pld_device *pld_device, unsigned int *ir);
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int pld_get_jtagspi_stuff_bits(struct pld_device *pld_device, unsigned int *facing_read_bits,
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unsigned int *trailing_write_bits);
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int pld_connect_spi_to_jtag(struct pld_device *pld_device);
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int pld_disconnect_spi_from_jtag(struct pld_device *pld_device);
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struct pld_driver {
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const char *name;
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__PLD_CREATE_COMMAND((*pld_create_command));
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const struct command_registration *commands;
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int (*load)(struct pld_device *pld_device, const char *filename);
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int (*get_ipdbg_hub)(int user_num, struct pld_device *pld_device, struct pld_ipdbg_hub *hub);
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int (*has_jtagspi_instruction)(struct pld_device *device, bool *has_instruction);
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int (*get_jtagspi_userircode)(struct pld_device *pld_device, unsigned int *ir);
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int (*connect_spi_to_jtag)(struct pld_device *pld_device);
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int (*disconnect_spi_from_jtag)(struct pld_device *pld_device);
|
||||
int (*get_stuff_bits)(struct pld_device *pld_device, unsigned int *facing_read_bits,
|
||||
unsigned int *trailing_write_bits);
|
||||
};
|
||||
|
||||
#define PLD_CREATE_COMMAND_HANDLER(name) \
|
||||
|
|
|
|||
|
|
@ -4,6 +4,8 @@ set _USER1 0x02
|
|||
|
||||
if { [info exists JTAGSPI_IR] } {
|
||||
set _JTAGSPI_IR $JTAGSPI_IR
|
||||
} elseif {[info exists JTAGSPI_CHAIN_ID]} {
|
||||
set _JTAGSPI_CHAIN_ID $JTAGSPI_CHAIN_ID
|
||||
} else {
|
||||
set _JTAGSPI_IR $_USER1
|
||||
}
|
||||
|
|
@ -21,7 +23,11 @@ if { [info exists FLASHNAME] } {
|
|||
}
|
||||
|
||||
target create $_TARGETNAME testee -chain-position $_CHIPNAME.tap
|
||||
flash bank $_FLASHNAME jtagspi 0 0 0 0 $_TARGETNAME $_JTAGSPI_IR
|
||||
if { [info exists _JTAGSPI_IR] } {
|
||||
flash bank $_FLASHNAME jtagspi 0 0 0 0 $_TARGETNAME $_JTAGSPI_IR
|
||||
} else {
|
||||
flash bank $_FLASHNAME jtagspi 0 0 0 0 $_TARGETNAME -pld $_JTAGSPI_CHAIN_ID
|
||||
}
|
||||
|
||||
# initialize jtagspi flash
|
||||
# chain_id: identifier of pld (you can get a list with 'pld devices')
|
||||
|
|
@ -33,7 +39,9 @@ flash bank $_FLASHNAME jtagspi 0 0 0 0 $_TARGETNAME $_JTAGSPI_IR
|
|||
proc jtagspi_init {chain_id proxy_bit {release_from_pwr_down_cmd -1}} {
|
||||
# load proxy bitstream $proxy_bit and probe spi flash
|
||||
global _FLASHNAME
|
||||
pld load $chain_id $proxy_bit
|
||||
if { $proxy_bit ne "" } {
|
||||
pld load $chain_id $proxy_bit
|
||||
}
|
||||
reset halt
|
||||
if {$release_from_pwr_down_cmd != -1} {
|
||||
jtagspi cmd $_FLASHNAME 0 $release_from_pwr_down_cmd
|
||||
|
|
|
|||
Loading…
Reference in New Issue