This lets the user set an itrigger trigger, which doesn't fit in the
normal breakpoint abstraction.
This implementation only allows control of a single itrigger. Hardware
could support more than one, and that may be useful to catch different
interrupts in different execution modes. But it would make the code/UI
more complex and it feels like an unlikely use case.
Change-Id: I76c88636ee73d4bd298b2bd1435cb5d052e86c91
Signed-off-by: Tim Newsome <tim@sifive.com>
Then also set it when we resume in examine(), which doesn't use the full
abstractions because not all required data structures are filled out
yet.
Hopefully fixes#749.
Change-Id: I0c6ab16da1f035ca2fbdb9f7be1462d44ddce3a0
Signed-off-by: Tim Newsome <tim@sifive.com>
Exit the loop when no harts are running, instead of when at least one
hart has halted.
Change-Id: Ia69b626bf1fee4034bd5ccc800a651bfe0e53685
Signed-off-by: Tim Newsome <tim@sifive.com>
It used to set all states to halted, but that's not right for harts that
are now unavailable. (It might be possible to call poll() at the right
time instead of duplicating some of its code, but I didn't see an easy
way to do that. The real requirement is that target->state is set to
TARGET_UNAVAILABLE before TARGET_EVENT_HALTED is is sent in
halt_finish(), because that's what triggers hwthread_update_threads(),
which must know about unavailable harts so they can be hidden from gdb.
Change-Id: I0a0bbdd4ec9ff8c9898e04045b84e1d2512c9336
Signed-off-by: Tim Newsome <tim@sifive.com>
There used to be entirely separate code paths depending on whether we're
in SMP mode or not. Now they're both the same.
Change-Id: I8f46295e4bc005f441af0c03d4f608c53b8a6586
Signed-off-by: Tim Newsome <tim@sifive.com>
This ensures that we populate the register cache and set target->state.
Some RISC-V changes had upset the balance.
Change-Id: I47fbf8ebd8fe39fa5b752212080f87e3b7e6e5e5
Signed-off-by: Tim Newsome <tim@sifive.com>
We don't correctly write it, so we shouldn't expect it to read back the
same value. Fixes hardware breakpoints on mcontrol triggers.
Change-Id: Ie5e445060ec9c8887af933fd8887e57308330f09
Indicate to the JTAG driver that it does not need
to read and return the DR register value after scanning the
JTAG chain.
riscv_batch_run(), calls jtag_add_dr_scan() to schedule a
DR scan operation. Eventually, this will result in the JTAG
driver performing a JTAG scan to write to or read from DR.
The decision on whether to write to and/or read from DR
register is determined by the second parameter to
jtag_add_dr_scan(), i.e. a "struct scan_field".
Of particular interest here is if
batch->fields[i]->in_value is not NULL, the JTAG developer
must return the DR value collected from the JTAG scan
operation.
When creating the DR scan operation instruction with
riscv_batch_add_dmi_write(), batch->fields[i]->in_value points
to a location in batch->data_in buffer,
meaning batch->field[i]->in_value is not NULL, and the JTAG
developer must therefore read and return the DR value collected.
The returning of the DR value is redundant in a write
operation.
This patch set batch->fields[i]->in_value to NULL to indicate
the DR value need not be returned. This allows the JTAG
developer to optimize away any code associated with returning
the DR value.
Normally, the extra work to return the DR value is negligible.
However, in one usecase it introduces significant delays
In this use case a JTAG driver forwards
all JTAG scan to a server on a network. If the server has to
return the DR value, it has to perform the JTAG scan before
replying to the JTAG driver, and only then the JTAG driver
can send the next JTAG scan operation. However, if there is
no need to return the DR value, the server can
acknowledge the JTAG operation request immediately,thus
signalling to the JTAG driver that it is free to send the next
JTAG scan operation. At the same time of receiving the second
JTAG operation the server will process the original JTAG scan.
This saves time and mitigates network delay. Also, not having
to include the DR value in resulting in smaller reply packet
from server to JTAG driver and save on network traffic.
This doubles download speeds to spike using remote bitbang.
Change-Id: Ibb37c3e32af0cc7006b22b8c4e1f31ed29c21d0f
Signed-off-by: Ooi, Cinly <cinly.ooi@intel.com>
Signed-off-by: Tim Newsome <tim@sifive.com>
Signed-off-by: Ooi, Cinly <cinly.ooi@intel.com>
Signed-off-by: Tim Newsome <tim@sifive.com>
Co-authored-by: Ooi, Cinly <cinly.ooi@intel.com>
It's only used to change what callback events are generated, and there
are none anyway. (That's probably a bug, but since 0.11 is so rare I'm
not going to worry about it.)
Fixes#757.
Change-Id: I5b5df3a9bec927fb0368304229533e2875a83f6b
Signed-off-by: Tim Newsome <tim@sifive.com>
breakpoint_add should use rtos only if request is done by gdb.
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
Change-Id: I779d1a905c6a3640869dca162e3cc001919e8f42
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
On some boards there is a HW bug: if fp unit is disabled (fs in mstatus
set to 0), accessing any fp register results in a hang (any abstract
command timeouts, untill the board is rebooted).
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
Change-Id: I0c0d1033889f15dcc326c4078bf9cbb5a8558565
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
E.g. the Zve* vector extensions have all the same registers as the full
V extension, but leaves misa.V clear.
Change-Id: Ib08c3612c52bb3a6b074d9431e3396c8f2f0ff27
Signed-off-by: Tim Newsome <tim@sifive.com>
Signed-off-by: Tim Newsome <tim@sifive.com>
Prep work for handling unavailable harts.
Change-Id: I9c00ed4cdad8edeaa5a13fbec7f88f40d8af9028
Signed-off-by: Tim Newsome <tim@sifive.com>
Signed-off-by: Tim Newsome <tim@sifive.com>
* Use match field for trigger
The watchpoint cannot capture all data modifications only through the
trigger of ANY SIZE and EQUAL, and an error will occur. This patch
accommodates watchpoints by adding more types of matches
Change-Id: I5c3c908dbd49ca47755b06f5cdbe451be3a81c8b
Signed-off-by: Xiang W <wxjstz@126.com>
Signed-off-by: Tim Newsome <tim@sifive.com>
* Update src/target/riscv/riscv.c
Co-authored-by: Jan Matyas <50193733+JanMatCodasip@users.noreply.github.com>
Signed-off-by: Xiang W <wxjstz@126.com>
* Update src/target/riscv/riscv.c
Co-authored-by: Jan Matyas <50193733+JanMatCodasip@users.noreply.github.com>
Signed-off-by: Xiang W <wxjstz@126.com>
* Update src/target/riscv/riscv.c
Co-authored-by: Jan Matyas <50193733+JanMatCodasip@users.noreply.github.com>
Signed-off-by: Xiang W <wxjstz@126.com>
* Update src/target/riscv/riscv.c
Co-authored-by: Jan Matyas <50193733+JanMatCodasip@users.noreply.github.com>
Signed-off-by: Xiang W <wxjstz@126.com>
* Update src/target/riscv/riscv.c
Co-authored-by: Jan Matyas <50193733+JanMatCodasip@users.noreply.github.com>
Signed-off-by: Xiang W <wxjstz@126.com>
* Update src/target/riscv/riscv.c
Co-authored-by: Jan Matyas <50193733+JanMatCodasip@users.noreply.github.com>
Signed-off-by: Xiang W <wxjstz@126.com>
* Update src/target/riscv/riscv.c
Change-Id: I3670347c4b00bf508373f7cc2f4950cbc09d6e2a
Signed-off-by: Xiang W <wxjstz@126.com>
* Add variable type trigger support
Change-Id: I60922c5f98574040b9a160e2aa0355871a581fe1
Signed-off-by: Xiang W <wxjstz@126.com>
* remove trailing whitespace
Change-Id: I168812e12b459ae3c4b3017c27a9b897e65d9f84
Signed-off-by: Xiang W <wxjstz@126.com>
* update triggers enumerate
Change-Id: I23a66afb0f772934b8911b522d0e4f116917519f
Signed-off-by: Xiang W <wxjstz@126.com>
Signed-off-by: Xiang W <wxjstz@126.com>
Signed-off-by: Tim Newsome <tim@sifive.com>
Co-authored-by: Jan Matyas <50193733+JanMatCodasip@users.noreply.github.com>
* target/riscv: Deal with DMI busy in sample_memory_bus_v1()
Change-Id: I810a4c4b7f02cb40ea99b7a500dce23c1bbd9231
Signed-off-by: Tim Newsome <tim@sifive.com>
* Comment code more clearly.
Co-authored-by: Jan Matyas <50193733+JanMatCodasip@users.noreply.github.com>
Signed-off-by: Tim Newsome <tim@sifive.com>
* Remove extra tab
Co-authored-by: Jan Matyas <50193733+JanMatCodasip@users.noreply.github.com>
Signed-off-by: Tim Newsome <tim@sifive.com>
Signed-off-by: Tim Newsome <tim@sifive.com>
Co-authored-by: Jan Matyas <50193733+JanMatCodasip@users.noreply.github.com>
* target/riscv Fix dm->current_hartid corruption on hartsellen discovery
Change-Id: Iec969df2675b608365eda2c3a83a4185752430f2
Signed-off-by: Charles Papon <charles.papon.90@gmail.com>
* target/riscv Ensure HART_INDEX_DIRTY does not have side effects
Change-Id: Ie89c94d97cd4f15c1be0327fddff75beea6ae027
Signed-off-by: Charles Papon <charles.papon.90@gmail.com>
Signed-off-by: Charles Papon <charles.papon.90@gmail.com>
This is added for future RISC-V changes. The RISC-V debug interface can
explicitly tell a debugger when a hart is unavailable. This is used for
instance when that hart is powered down (or yet to be powered up out of
reset).
Change-Id: I8a062d59eea1e5b3c788281a75159592db024683
Signed-off-by: Tim Newsome <tim@sifive.com>
* target/riscv: Correctly set target->state in deassert_reset
This bug didn't lead to problems, but it would with some upcoming
changes.
Change-Id: I552acbae9977150c4c9e573f8852033bc80fcebb
Signed-off-by: Tim Newsome <tim@sifive.com>
* Keep debug_reason in sync with state
Co-authored-by: Jan Matyas <50193733+JanMatCodasip@users.noreply.github.com>
Signed-off-by: Tim Newsome <tim@sifive.com>
Signed-off-by: Tim Newsome <tim@sifive.com>
Co-authored-by: Jan Matyas <50193733+JanMatCodasip@users.noreply.github.com>
* [riscv] step operation handler should respect handle_breakpoints parameter
When step operation is requested the OpenOCD frontend (like gdb server
or TCL server) has an option to control how existing breakpoints are
handled upon step.
Some OpenOCD frontends (like gdbserver) may choose to disable special
handling of existing breakpoints - thus handle_breakpoints is set to 0,
while others (like TCL server) expect target handler to temporary
disable the matching breakpoint to allow the step operation to complete
successfully.
In the current implementation handle_breakpoints parameter was ignored
by target-specific handler. Thus, the following sequence of commands:
```
halt
bp <current_pc> 4
step
```
Resulted in *step* operation to not change PC because of bp match.
This commit addresses this issue.
* Adjusted calls to logging facilities (addressed review comments)
Co-authored-by: Tim Newsome <tim@sifive.com>
Signed-off-by: Anatoly Parshintsev <114445139+aap-sc@users.noreply.github.com>
Signed-off-by: Anatoly Parshintsev <114445139+aap-sc@users.noreply.github.com>
Co-authored-by: Tim Newsome <tim@sifive.com>
* Properly track selecting multiple harts at once.
use_hasel is a bit of a hack.
Change-Id: Ia589ebc16bca32038d915df9988361b88e940917
Signed-off-by: Tim Newsome <tim@sifive.com>
* Clarifying comment.
Co-authored-by: Jan Matyas <50193733+JanMatCodasip@users.noreply.github.com>
Signed-off-by: Tim Newsome <tim@sifive.com>
* Rename set_hartsel to set_dmcontrol_hartsel
Change-Id: Iab28531281aa6fc604ec7d34974ed444ea9ea850
* Make set_dmcontrol_hartsel() more idiomatic.
Change-Id: I56a885043c515359e33b9c8a03aed637c81d1486
* Use constant for multiple harts instead of -1.
Change-Id: Iefeaf74202f2b4918d21f15f7ff7ca514175b8fb
Signed-off-by: Tim Newsome <tim@sifive.com>
Signed-off-by: Tim Newsome <tim@sifive.com>
Co-authored-by: Jan Matyas <50193733+JanMatCodasip@users.noreply.github.com>
Also add an early exit for if any harts are unavailable.
Change-Id: I0875d4d213c9faf87b219d8d57e440881366c8f8
Signed-off-by: Tim Newsome <tim@sifive.com>
This was used to track which hart a given operation must apply to. But
we already have a target associated with each operation, and from there
we can find the desired hart id. dm013_info_t already tracks
current_hartid (meaning which hart ID is currently selected by the DM).
This makes the code simpler to understand. Also it turns out we don't
need to make sure the correct hart ID is currently selected because
there are only a few real entry points.
Change-Id: Ibe8d5e156523397f245edd6ec0a5df3239b717bf
Signed-off-by: Tim Newsome <tim@sifive.com>
According to RISC-V External Debug Support Version 0.13.2 (paragraph
3.12.6), cmderr field contains a valid value only if busy is 0, so it is
incorrect to analize it on timeout.
Increase "value_buf" size so it can hold a 64-bit number represented
as a string. Previous size could only hold a 32-bit number string.
Signed-off-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
Change-Id: If6fbc875236e6ddc59522fbc25db0129eb60ee27
Reviewed-on: https://review.openocd.org/c/openocd/+/7221
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Scan-build reports:
Logic error: Uninitialized argument value
riscv.c:2688 2nd function call argument is an uninitialized value
This is a real error cause by running the command "riscv
authdata_write" without arguments. In such case 'value' is not
initialized and is passed to and used by r->authdata_write().
Reorganize the code to:
- detect the correct amount or command's arguments;
- drop the LOG_ERROR() on ERROR_COMMAND_SYNTAX_ERROR;
- drop the 'else' after 'return'.
Change-Id: I62e031220593b8308bc674b753e15d16d4c5c9ac
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7210
Tested-by: jenkins
Reviewed-by: Jan Matyas <matyas@codasip.com>
Reviewed-by: Tim Newsome <tim@sifive.com>
Scan-build reports:
Logic error: Result of operation is garbage or undefined
riscv.c:1614 The result of the left shift is undefined due
to shifting by '4294967281', which is greater or
equal to the width of type 'target_addr_t'
This is a false warning due to clang that considers the impossible
case of 32 bits hart (xlen = 32) in SATP_MODE_SV48 mode
(info->va_bits = 48).
Under such case:
riscv.c:1614 ... ((target_addr_t)1 << (xlen - (info->va_bits - 1))) ...
the shift amount wraps around the unsigned type and assumes the
value 4294967281 (0xfffffff1).
Use assert() to prevent clang from complaining.
Change-Id: I08fdd2a806c350d061641e28cf15a51b397db099
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7209
Reviewed-by: Tim Newsome <tim@sifive.com>
Reviewed-by: Jan Matyas <matyas@codasip.com>
Tested-by: jenkins
Scan-build reports:
Unused code: Dead nested assignment
riscv.c:459 Although the value stored to 'ir_user4_raw' is
used in the enclosing expression, the value is
never actually read from 'ir_user4_raw'
This is caused by the value reassigned in 'ir_user4_raw':
riscv.c:459 ir_user4[3] = (uint8_t)(ir_user4_raw >>= 8);
but never used.
Drop the DIY conversion in favor of h_u32_to_le() that does not
reassign the input value.
Change-Id: Ifad29f4c46d4a2d0a2f5a5c4104d768cc3db2794
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7208
Reviewed-by: Tim Newsome <tim@sifive.com>
Reviewed-by: Jan Matyas <matyas@codasip.com>
Tested-by: jenkins
Scan-build reports:
Unused code: Dead assignment
riscv.c:716 Value stored to 'result' is never read
Remove the initialization of variable 'result'.
Change-Id: Ied67bb4fcfa5bace186522074247ead43a5d5cd5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7207
Reviewed-by: Tim Newsome <tim@sifive.com>
Reviewed-by: Jan Matyas <matyas@codasip.com>
Tested-by: jenkins
Scan-build reports:
Unused code: Dead initialization
riscv-013.c:2362 Value stored to 'control' during its
initialization is never read
Remove the initialization of variable 'control'.
Change-Id: I548f8175530b9a2aa4c1788549d6467bf9824584
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7206
Reviewed-by: Tim Newsome <tim@sifive.com>
Reviewed-by: Jan Matyas <matyas@codasip.com>
Tested-by: jenkins
Scan-build complains about variable 'sbcs_orig' that can be used
not initialized.
Logic error: Assigned value is garbage or undefined
riscv-013.c:4468 Assigned value is garbage or undefined
This is caused by not checking the return value of the call
riscv-013.c:4466 dmi_read(target, &sbcs_orig, DM_SBCS);
In fact when dmi_read() returns error, the variable 'sbcs_orig' is
not assigned.
Check the returned value.
Change-Id: Ia9032a0229aa243138f95f4e13f765726a4ceae9
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7205
Reviewed-by: Tim Newsome <tim@sifive.com>
Reviewed-by: Jan Matyas <matyas@codasip.com>
Tested-by: jenkins
Scan-build triggers a warning:
Unix API: Allocator sizeof operand mismatch
dsp563xx.c:2143 Result of 'calloc' is converted to a pointer
of type 'uint8_t', which is incompatible with sizeof
operand type 'uint32_t'
It's a false positive because calloc() is properly used in this
case, as the uint8_t array is used in blocks of 4 elements to read
or write uint32_t values.
Either
calloc(sizeof(uint32_t), count);
and
malloc(count * sizeof(uint32_t));
keep triggering the same warning.
Drop the warning by using the constant '4' as size of uint32_t, as
already used few lines below.
Change-Id: I5bb1ece177774eefdc5d9cd049338f8f2be87cd7
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7203
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
With the old checkpatch we cannot use the correct format for the
SPDX tags in the file .c, in fact the C99 comments are not allowed
and we had to use the block comment.
With the new checkpatch, let's switch to the correct SPDX format.
Change created automatically through the command:
sed -i \
's,^/\* *\(SPDX-License-Identifier: .*[^ ]\) *\*/$,// \1,' \
$(find src/ contrib/ -name \*.c)
Change-Id: I6da16506baa7af718947562505dd49606d124171
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7153
Tested-by: jenkins
Resolves issues where registers are accessed when poll() logic is inactive or has not yet been triggered.
Signed-off-by: Ian Thompson <ianst@cadence.com>
Change-Id: If7a4d00938fb188b008325249627f7773c3484c5
Reviewed-on: https://review.openocd.org/c/openocd/+/7197
Tested-by: jenkins
Reviewed-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Read PS from EPS[debuglevel] during fetch such that it reflects the correct value when read via telnet (not just via gdb_server).
Signed-off-by: Ian Thompson <ianst@cadence.com>
Change-Id: I8504f68989bc6d5fe451a8cb69d01c86f4ec0100
Reviewed-on: https://review.openocd.org/c/openocd/+/7195
Tested-by: jenkins
Reviewed-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Requested in https://review.openocd.org/c/openocd/+/6964.
I'm making the change here so I have a chance to test it properly before
pushing it upstream.
A nice effect of this change is that we avoid some unnecessary polling
early on when gdb is connecting and we would poll once every time we
send gdb a qXfer packet.
Change-Id: I4bdb9f05839e8c1e01ff6dde49d6589595418095
Signed-off-by: Tim Newsome <tim@sifive.com>
The method soft_reset_halt is optional; no need to add an
empty function.
Remove mips_mips64_soft_reset_halt() and move the TODO comment
in struct target_type.
Change-Id: Id541a75e7a08645568961d59b73a120c2238701f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7184
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Read buffer is sized for 32-bit APB version of PWRSTAT/PWRCTL registers. Initialize to zero so 8-bit JTAG register mirrors are accurate.
Signed-off-by: Ian Thompson <ianst@cadence.com>
Change-Id: I81310649fa7180893d0188aab3c8a14315aaea0a
Reviewed-on: https://review.openocd.org/c/openocd/+/7183
Tested-by: jenkins
Reviewed-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Symbols that are not used outside the file should not be exported
and should be declared as static.
Change-Id: Icbe7f7bce287b903edec9dc9db3370722c51fbd5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7173
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Symbols that are not used outside the file should not be exported
and should be declared as static.
Move the existing comments to the static declarations.
Change-Id: Idf208e3fda4b3f8df789553cf03ebf5f20d811bb
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7170
Reviewed-by: Jan Matyas <matyas@codasip.com>
Reviewed-by: Tim Newsome <tim@sifive.com>
Tested-by: jenkins
Symbols that are not exported should be declared as static.
Change-Id: I2475524f4c14520e3163572560f4a9f276356ed5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7168
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Symbols that are not exported should be declared as static.
Change-Id: Ieb627f7f896e4663b0d5b18c4ab1853b39d23d03
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7167
Reviewed-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Reviewed-by: Ian Thompson <ianst@cadence.com>
Tested-by: jenkins
Symbols that are not exported should be declared as static.
Change-Id: Ie3bd17535c8cb2a0fec5d3bedfe7de3e0a702613
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7166
Tested-by: jenkins
Reviewed-by: Tim Newsome <tim@sifive.com>
Reviewed-by: Jan Matyas <matyas@codasip.com>
For some configurations, notably on DAP systems, resolve issue where single-stepping does not always transition into the HALTED state.
Signed-off-by: Ian Thompson <ianst@cadence.com>
Change-Id: I053f4eaffad8c3228878ba87580ada640e4bd2fe
Reviewed-on: https://review.openocd.org/c/openocd/+/7150
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
- Enable ADIv5 DAP systems via JTAG or SWD transport
- Select correct PWRCTL/PWRSTAT bits for XDM/APB
Signed-off-by: Ian Thompson <ianst@cadence.com>
Change-Id: I5894210c804f85075da868d0cfc6fb20b589d99f
Reviewed-on: https://review.openocd.org/c/openocd/+/7144
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
We have left the camelcase symbols *xPSR* for some time, to avoid
any conflict with possibly pending patches in gerrit.
With the approaching v0.12.0-rc1, it's time to revisit it.
The patches in gerrit that conflict with this rename are all not
merge-able due to conflicts or due to negative review.
Drop these CamelCase symbols.
Change-Id: Ifbac4c1df9cc55994e024971a2aaebeed2ea4ed3
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7155
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Without the help of checkpatch, some CamelCase symbol passed
through the filter of maintainer's review.
Drop them.
Change-Id: If5fb07b2ffb89e853dd2a61f20d4134aa6e20d24
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: 48f267d4ad ("flash/stm32l4x: avoid using magic numbers for device ids")
Fixes: 5ab74bde06 ("semihosting: User defined operation, Tcl command exec on host")
Reviewed-on: https://review.openocd.org/c/openocd/+/7154
Tested-by: jenkins
Otherwise OpenOCD simply doesn't work without giving any indication why.
Change-Id: I21703fc1a0d9bed2f59da95f8a8395fe139484a4
Signed-off-by: Tim Newsome <tim@sifive.com>
* Don't read dmcontrol to set hartsel
We already know what dmcontrol should be. This addresses a long-standing
TODO. In a toy test, this reduced the number of scans by 10+%. (Most of
those are probably in poll(), so don't actually affect perceived
performance.)
Change-Id: I18e5ca391f0f5fb35f30d44dfef834e5a66aee20
Signed-off-by: Tim Newsome <tim@sifive.com>
* Make code easier to read
Co-authored-by: Jan Matyas <50193733+JanMatCodasip@users.noreply.github.com>
Signed-off-by: Tim Newsome <tim@sifive.com>
Signed-off-by: Tim Newsome <tim@sifive.com>
Co-authored-by: Jan Matyas <50193733+JanMatCodasip@users.noreply.github.com>
Use indirect enum IDs to access XDM registers in preparation for supporting both NAR (JTAG) and APB (DAP). No new clang static analysis warnings.
Signed-off-by: Ian Thompson <ianst@cadence.com>
Change-Id: I0b742fe4661ff3cf609454b8650493d141a1e1ff
Reviewed-on: https://review.openocd.org/c/openocd/+/7143
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested with an PLUS-F5270 board which uses the MM32F5277E9PV.
Signed-off-by: iysheng <iyysheng@gmail.com>
Change-Id: Icb75ae8337fdc6fa60e39d3d74dd8bc163707bdd
Reviewed-on: https://review.openocd.org/c/openocd/+/7136
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Scan-build of target/xtensa/ has no clang analyzer warnings from xtensa source files.
Signed-off-by: Ian Thompson <ianst@cadence.com>
Change-Id: I11a125c923ece9a6fd0d9ee1698f742f88ee5cab
Reviewed-on: https://review.openocd.org/c/openocd/+/7141
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Hopefully this will be the final version.
Change-Id: Ib2f8cd6f613c5e0f8e8bf7a16c3edbf2d9b439b2
Signed-off-by: Tim Newsome <tim@sifive.com>
Signed-off-by: Tim Newsome <tim@sifive.com>
See https://github.com/riscv/riscv-opcodes/pull/139
Change-Id: I77ae5ab369e6cde26ad44d177dcae38c0fbe08ef
Signed-off-by: Tim Newsome <tim@sifive.com>
Signed-off-by: Tim Newsome <tim@sifive.com>
Fix Unused code Dead assignment at line 657
Fix Memory error Double free at line 2851
Fix Memory error Memory leak at line 2530
Fix error: 'a3' may be used uninitialized at line 758
Fix error: '%04x' directive writing between 4 and 8 bytes
into a region of size 5 at line 2471
Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: I0382a622bc7c4108a335fd741816577e79240397
Reviewed-on: https://review.openocd.org/c/openocd/+/7137
Tested-by: jenkins
Reviewed-by: Ian Thompson <ianst@cadence.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Generic Xtensa LX support extends the original Espressif/Xtensa
patch-set to support arbitrary Xtensa configurations, as defined in
a core-specific .cfg file. Not yet fully-featured. Additional
functionality to be added:
- Xtensa NX support
- DAP/SWD support
- File-IO support
- Generic Xtensa multi-core support
Valgrind-clean, no new Clang analyzer warnings
Signed-off-by: Ian Thompson <ianst@cadence.com>
Change-Id: I08e7bf8fa57c25b5d0cb75a1aa7a2ac13a380c52
Reviewed-on: https://review.openocd.org/c/openocd/+/7055
Tested-by: jenkins
Reviewed-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Also used type helper (PRId64) to specify format of int64_t
Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: I594863eab594aff621c26fefcc69a1872e9730ee
Reviewed-on: https://review.openocd.org/c/openocd/+/7111
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Now we get the license comment on the first line, which is required.
Change-Id: I54414db3c89ee6027e159ce9348459bc923b8595
Signed-off-by: Tim Newsome <tim@sifive.com>
Signed-off-by: Tim Newsome <tim@sifive.com>
Some files have author info some doesn't. For the consistency we removed all.
Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: Ie6f1ec012302e3a954c75c5106f12820722cb715
Reviewed-on: https://review.openocd.org/c/openocd/+/7104
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
The S_RESET_ST sticky bit is reset after DHCSR read.
It is set at power-on reset and keeps active until the debuger reads DHCSR.
Ignore S_RESET_ST at the very first read after OpenOCD start
and suppress possibly misleading message "external reset detected"
if we cannot guarantee the reset happened recently.
While on it add a TODO comment.
Change-Id: I15217c2ca6f69ac97aff8be86bce67cba94a42cd
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7109
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Provide a customizable hook for handling target-specific GDB queries
Valgrind-clean, no new Clang analyzer warnings
Signed-off-by: Ian Thompson <ianst@cadence.com>
Change-Id: I684a259ed29f3651cbce668101cff421e522f79e
Reviewed-on: https://review.openocd.org/c/openocd/+/7082
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
The same flag 'jtag_poll' is currently used as local data for the
command 'poll' and to temporarily mask the target polling.
This can cause unexpected behavior if the command 'poll' is
executed while polling is temporarily masked.
Add a new flag 'jtag_poll_en' to hold the temporarily mask
condition and keep 'jtag_poll' for the 'poll' command only.
While there, change the initial assignment of 'jtag_poll' using
the proper boolean value.
Change-Id: I18dcf7c65b07aefadf046caaa2fcd2d74fa6fbae
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7009
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
This one doesn't have the license in there, which means now it's
acceptable to GPLv2 again.
See https://github.com/riscv/riscv-openocd/pull/711
Change-Id: I8ba27801172ffa955470d2627fa656cad282ee99
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7087
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tcl commands 'arm reg', 'arm mcr/mrc' do not work on M-profile based devices.
Isolate them from 'arm core_state' and 'arm disassemble' and do not chain
them from armv7m_command_handlers.
Change-Id: I2c6befdf82575e95cf05ed158ab5e6faa1a182c3
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7101
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Tcl command 'arm core_state' was exposed even on Cortex-M devices.
However it returned message "Unsupported Command" without error status
on such device.
Set the only possible arm->core_state ARM_STATE_THUMB in armv7m init.
Block setting core_state to arm on Cortex-M.
Change-Id: I9525553ac8863a6cf77bbacbcd57e354b6cfe1ca
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7100
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
If a Cortex-M MCU become unresponsive during a debug session and
re-examination fails to find MEM-AP, debug_ap pointer is set to NULL.
Eventual call of cortex_m_poll() dereferences debug_ap.
Check debug_ap validity at the begin of cortex_m_poll().
Change-Id: I9519f48760c91a48a9e5e8c34634d247098cb14a
Fixes: 35a503b08d (arm_adi_v5: add ap refcount and add get/put around ap use)
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7108
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Just a cosmetic refactoring.
Change-Id: I7fbc05324e346fafc98d1b42691d33d3d8fbd04e
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7003
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
AARCH64_COMMON_MAGIC was same as CORTEX_A_COMMON_MAGIC, probably copy pasta.
Define unique AARCH64_COMMON_MAGIC
Change-Id: Ie30e0028453a1fce5624ecad9bf73d5ac3791281
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6997
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Unify common_magic type to unsigned int
Move common_magic to be the first member of the struct
Add unsigned specifier to xxx_COMMON_MAGIC #defines
Change-Id: If961d33232698529514ba3720e04418baf6dc6fe
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6996
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
The working area allocation routines use 4 byte word alignment.
In the corner case the size of the working area is not aligned,
target_alloc_working_area() of size = target_get_working_area_avail()
will fail because the size gets aligned up and does not fit to the area
which size is aligned down.
Align down the result of target_get_working_area_avail() to cope with that
corner case.
While on it use fancy ALIGN_... macros instead of bitwise and operator.
Change-Id: Ia2a1e861c401c2c78fe6323379a3776fb4f47b06
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7096
Tested-by: jenkins
Reviewed-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
If range's upper bound was equal to 2^64 or the range was wrapping around 0
(which is perfectly legal), writes were not performed due to riscv_addr_t
overflow.
Make the main RISC-V structure more compliant with OpenOCD coding style.
Other typedefs remains as is.
Change-Id: I5657ad28fea8108fd66ab27b2dfe1c868dc5805b
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6998
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tim Newsome <tim@sifive.com>
We found that the NPCX has an issue with the byte lanes so that non byte
aligned writes aren't working. To overcome this, for byte accesses we
copy the byte to be written to all of the byte lanes.
doc: Document command nu_npcx_quirks
Signed-off-by: benjbender <benjbender@gmail.com>
[Andreas Fritiofson: Squashed commits]
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Change-Id: I9ef63bf692f4e68f57459e1ec33f3abcbf533cd2
Reviewed-on: https://review.openocd.org/c/openocd/+/6630
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tim Newsome
Dolu1990
Evgeniy Naydanov
Xiang W
Anatoly Parshintsev
Dmitry Ryzhov
Evgeniy Naydanov
Daniel Goehring
Ian Thompson
Antonio Borneo
Erhan Kurubas
iysheng
Tomas Vanek
Ben Bender