target/semihosting: export semihosting_common_handlers[] from header file
Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com> Change-Id: I4add0c1dc7888497ee90fd02754607a16434b66f Reviewed-on: https://review.openocd.org/c/openocd/+/7075 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
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@ -3144,8 +3144,6 @@ static const struct command_registration aarch64_exec_command_handlers[] = {
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COMMAND_REGISTRATION_DONE
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};
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extern const struct command_registration semihosting_common_handlers[];
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static const struct command_registration aarch64_command_handlers[] = {
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{
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.name = "arm",
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@ -1116,8 +1116,6 @@ static int jim_mcrmrc(Jim_Interp *interp, int argc, Jim_Obj * const *argv)
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return JIM_OK;
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}
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extern const struct command_registration semihosting_common_handlers[];
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static const struct command_registration arm_exec_command_handlers[] = {
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{
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.name = "reg",
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@ -632,7 +632,6 @@ static const struct command_registration esp32_any_command_handlers[] = {
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COMMAND_REGISTRATION_DONE
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};
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extern const struct command_registration semihosting_common_handlers[];
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static const struct command_registration esp32_command_handlers[] = {
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{
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.chain = esp_xtensa_smp_command_handlers,
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@ -3114,7 +3114,6 @@ static const struct command_registration riscv_exec_command_handlers[] = {
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* protocol, then a command like `riscv semihosting enable` will make
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* sense, but for now all semihosting commands are prefixed with `arm`.
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*/
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extern const struct command_registration semihosting_common_handlers[];
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const struct command_registration riscv_command_handlers[] = {
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{
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@ -201,4 +201,6 @@ void semihosting_set_field(struct target *target, uint64_t value,
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size_t index,
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uint8_t *fields);
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extern const struct command_registration semihosting_common_handlers[];
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#endif /* OPENOCD_TARGET_SEMIHOSTING_COMMON_H */
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