mirror of https://github.com/YosysHQ/yosys.git
8d3b238b9b
Adds `double_sync_ram_sdp` to `common/blockram.v`, providing a test for two disjoint memories. Refactor python blockram template to take a list of params to support the above. Also change the smaller single TDP36K tests to also test `port_a_width` value. |
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| .. | ||
| anlogic | ||
| common | ||
| ecp5 | ||
| efinix | ||
| fabulous | ||
| gatemate | ||
| gowin | ||
| ice40 | ||
| intel_alm | ||
| machxo2 | ||
| nexus | ||
| quicklogic | ||
| xilinx | ||
| run-test.sh | ||