yosys/tests/arch/quicklogic
Krystine Sherwin 8d3b238b9b quicklogic: Testing split TDP36K
Adds `double_sync_ram_sdp` to `common/blockram.v`, providing a test for two disjoint memories.
Refactor python blockram template to take a list of params to support the above.
Also change the smaller single TDP36K tests to also test `port_a_width` value.
2023-12-04 15:52:03 +01:00
..
pp3 quicklogic: Move pp3 tests one level down 2023-12-04 15:52:02 +01:00
qlf_k6n10f quicklogic: Testing split TDP36K 2023-12-04 15:52:03 +01:00
.gitignore quicklogic: Add .gitignore file for test outputs. 2021-03-23 17:35:00 +01:00