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226 Commits

Author SHA1 Message Date
Eddie Hung 0b5b56c1ec Pack partial-product adder DSP48E1 packing 2019-08-09 15:19:33 -07:00
Eddie Hung 162eab6b74 Combine techmap calls 2019-08-08 10:55:48 -07:00
Eddie Hung 7160243874 Move xilinx_dsp to before alumacc 2019-08-08 10:45:56 -07:00
Eddie Hung 48d0f99406 stoi -> atoi 2019-08-07 11:09:17 -07:00
Eddie Hung fc0b5d5ab6 Change $__softmul back to $mul 2019-08-01 12:45:14 -07:00
Eddie Hung b97fe6e866 Work in progress for renaming labels/options in synth_xilinx 2019-07-18 14:20:43 -07:00
Eddie Hung 5562cb08a4 Use single DSP_SIGNEDONLY macro 2019-07-18 13:09:55 -07:00
Eddie Hung 58e63feae1 Update comment 2019-07-17 13:26:17 -07:00
Eddie Hung 6390c535ba Revert drop down to 24x16 multipliers for all 2019-07-16 14:30:25 -07:00
Eddie Hung 569cd66764 Merge branch 'xc7dsp' of github.com:YosysHQ/yosys into xc7dsp 2019-07-16 14:18:36 -07:00
David Shah 95c8d27b0b xilinx: Treat DSP48E1 as 24x17 unsigned for now (actual behaviour is 25x18 signed) 
Signed-off-by: David Shah <dave@ds0.me>
 2019-07-16 16:47:53 +01:00
Eddie Hung 5f00d335d4 Oops forgot these files 2019-07-15 15:03:15 -07:00
Eddie Hung 146451a767 Merge remote-tracking branch 'origin/master' into xc7dsp 2019-07-15 09:49:41 -07:00
Marcin Kościelnicki ce250b341c synth_xilinx: Initial Spartan 6 block RAM inference support. 2019-07-11 14:45:48 +02:00
Eddie Hung 7b2599cb94 Move ABC FF stuff to abc_ff.v; add support for other FD* types 2019-07-10 17:06:05 -07:00
Eddie Hung 838ae1a14c synth_xilinx's map_cells stage to techmap ff_map.v 2019-07-10 16:15:57 -07:00
Eddie Hung 052060f109 Merge remote-tracking branch 'origin/master' into xaig_dff 2019-07-10 16:05:41 -07:00
Eddie Hung b33ecd2a74 Move dsp_map.v into cells_map.v; cleanup synth_xilinx a little 2019-07-10 16:00:03 -07:00
Eddie Hung cea7441d8a Merge remote-tracking branch 'origin/master' into xc7dsp 2019-07-10 15:58:01 -07:00
Eddie Hung bb2144ae73
Merge pull request #1180 from YosysHQ/eddie/no_abc9_retime 
Error out if -abc9 and -retime specified
 2019-07-10 14:38:13 -07:00
Eddie Hung 6bbd286e03 Error out if -abc9 and -retime specified 2019-07-10 12:47:48 -07:00
Eddie Hung e573d024a2 Call muxpack and pmux2shiftx before cmp2lut 2019-07-09 21:26:38 -07:00
Eddie Hung c55530b901 Restore opt_clean back to original place 2019-07-09 14:29:58 -07:00
Eddie Hung 5b48b18d29 Restore missing techmap -map +/cmp2lut.v with LUT_WIDTH=6 2019-07-09 14:28:54 -07:00
Eddie Hung c68b909210 synth_xilinx to call commands of synth -coarse directly 2019-07-09 10:21:54 -07:00
Eddie Hung 737340327f Revert "synth_xilinx to call "synth -run coarse" with "-keepdc"" 
This reverts commit 7f964859ec.
 2019-07-09 10:15:02 -07:00
Eddie Hung bc84f7dd10 Fix spacing 2019-07-09 09:22:12 -07:00
Eddie Hung 667199d460 Fix spacing 2019-07-09 09:16:00 -07:00
Eddie Hung 45da3ada7b Do not call opt -mux_undef (part of -full) before muxcover 2019-07-08 23:49:16 -07:00
Eddie Hung 7f964859ec synth_xilinx to call "synth -run coarse" with "-keepdc" 2019-07-08 19:23:24 -07:00
Eddie Hung 78914e2e0e Capitalisation 2019-07-08 17:06:22 -07:00
Eddie Hung baf47e496f Add synth_xilinx -widemux recommended value 2019-07-08 17:04:39 -07:00
Eddie Hung 895ca50173 Fixes for 2:1 muxes 2019-07-08 12:03:38 -07:00
Eddie Hung 0944acf3af synth_xilinx -widemux=2 is minimum now 2019-07-08 11:29:21 -07:00
David Shah c865559f95 xc7: Map combinational DSP48E1s 
Signed-off-by: David Shah <dave@ds0.me>
 2019-07-08 19:15:25 +01:00
Eddie Hung dbe1326573 Parametric muxcover costs as per @daveshah1 2019-07-08 11:08:20 -07:00
Eddie Hung c58998a7d2 atoi -> stoi as per @daveshah1 2019-07-08 10:48:10 -07:00
Eddie Hung 699d8e3939 Merge remote-tracking branch 'origin/master' into xaig_dff 2019-07-01 10:44:42 -07:00
Eddie Hung 728839d6ca Remove peepopt call in synth_xilinx since already in synth -run coarse 2019-06-28 12:53:38 -07:00
Eddie Hung 4ef26d4755 Merge remote-tracking branch 'origin/master' into xc7mux 2019-06-28 11:09:42 -07:00
Eddie Hung 312c03e4ca Remove redundant doc 2019-06-27 15:28:55 -07:00
Eddie Hung 4d00e27ed7 Merge remote-tracking branch 'origin/xaig' into xc7mux 2019-06-27 11:23:30 -07:00
Eddie Hung 1237a4c116 Add warning if synth_xilinx -abc9 with family != xc7 2019-06-27 11:22:49 -07:00
Eddie Hung 6c256b8cda Merge origin/master 2019-06-27 11:20:15 -07:00
Eddie Hung b9ff0503f3 synth_xilinx's muxcover call to be very conservative -- -nodecode 2019-06-26 17:57:10 -07:00
Eddie Hung f0a1726a1a Accidentally removed "simplemap $mux" 2019-06-26 17:48:49 -07:00
Eddie Hung 2b104ed6c8 Replace with <internal options> 2019-06-26 17:42:50 -07:00
Eddie Hung cae69a3edd Rework help_mode for synth_xilinx -widemux 2019-06-26 17:41:21 -07:00
Eddie Hung 5f807a7a5b Return to upstream synth_xilinx with opt -full and wreduce 2019-06-26 16:25:48 -07:00
Eddie Hung c762be5930 Instead of blocking wreduce on $mux, use -keepdc instead #1132 2019-06-26 11:48:35 -07:00
Eddie Hung 8d8261c71f Do not call opt with -full before muxcover 2019-06-26 11:38:28 -07:00
Eddie Hung 80de03a7a6 Merge remote-tracking branch 'origin/xaig' into xc7mux 2019-06-26 11:24:39 -07:00
Eddie Hung 612083a807 Merge remote-tracking branch 'origin/xaig' into xc7mux 2019-06-26 10:33:54 -07:00
Eddie Hung 5e1b8d458b Remove unused var 2019-06-26 10:33:07 -07:00
Eddie Hung 988e6163ab Add _nowide variants of LUT libraries in -nowidelut flows 2019-06-26 10:23:29 -07:00
Eddie Hung 799b18263f Merge branch 'koriakin/xc7nocarrymux' into xaig 2019-06-26 10:04:01 -07:00
Eddie Hung 7389b043c0 Merge branch 'xc7nocarrymux' of https://github.com/koriakin/yosys into koriakin/xc7nocarrymux 2019-06-26 09:33:38 -07:00
Eddie Hung 177c26ca35 Rename -minmuxf to -widemux 2019-06-26 09:16:45 -07:00
Eddie Hung 7fbfcf20d1 Move comment 2019-06-24 14:15:00 -07:00
Eddie Hung aa1eeda567 Modify costs for muxcover 2019-06-24 11:51:55 -07:00
Eddie Hung 36e6da5396 Change synth_xilinx's -nomux to -minmuxf <int> 2019-06-24 10:04:01 -07:00
Eddie Hung 39e0e006d5 Fix wreduce call (!!!), tweak muxcover costs 2019-06-21 18:12:07 -07:00
Eddie Hung faa2d6fc1c Constrain wreduce only if wide mux 2019-06-21 17:12:34 -07:00
Eddie Hung ed00823b41 synth_xilinx to now wreduce except $mux, remove extra peepopt 2019-06-21 16:56:56 -07:00
Eddie Hung 11886c874c Restore wreduce to synth_xilinx, after muxcover 2019-06-21 16:18:29 -07:00
Eddie Hung aa0b107afb synth_xilinx to use _ABC macro, and perform muxpack again 2019-06-21 15:48:20 -07:00
Eddie Hung 7acbea6b28 Fix alignment 2019-06-21 14:38:30 -07:00
Eddie Hung f433a52374 Add FIXME about need for -mux4 2019-06-21 11:15:23 -07:00
Eddie Hung dd22edcd28 Expand synth -coarse without wreduce, move muxcover 2019-06-21 11:12:32 -07:00
Eddie Hung f11c9a419b Call opt_expr -mux_undef to get rid of 1'bx in muxes prior to abc 2019-06-20 17:38:16 -07:00
Eddie Hung d1dadfcec8 Call opt_expr -mux_undef to get rid of 1'bx in muxes prior to abc 2019-06-20 16:45:09 -07:00
Eddie Hung 5ce672d1c5 Merge remote-tracking branch 'origin/xaig' into xaig_dff 2019-06-17 12:14:55 -07:00
Eddie Hung c15ee827f4 Try -W 300 2019-06-17 10:29:06 -07:00
Eddie Hung 1ec450d6bf Try -W 300 2019-06-16 12:08:03 -07:00
Eddie Hung a76c8a7ffd Fix initialisation of flops 2019-06-15 09:46:35 -07:00
Eddie Hung ac18a76beb Map to $_FF_ instead of $_DFF_P_ to prevent recursion issues 2019-06-15 09:34:48 -07:00
Eddie Hung 295bb23ae0 Wrap FDRE with $__ABC_FDRE containing comb 2019-06-15 09:08:56 -07:00
Eddie Hung b63b2a0bd4 Revert "Remove wide mux inference" 
This reverts commit 738fdfe8f5.
 2019-06-14 12:50:24 -07:00
Eddie Hung 2e34859a6b Add XC7_WIRE_DELAY macro to synth_xilinx.cc 2019-06-14 11:38:22 -07:00
Eddie Hung d47ff7ba87 Rename +/xilinx/abc.{box,lut} -> abc_xc7.{box,lut} 2019-06-14 10:51:11 -07:00
Eddie Hung 627a62a797 Make doc consistent 2019-06-14 10:32:46 -07:00
Eddie Hung c7f5091c2f Reduce diff with master 2019-06-12 09:34:41 -07:00
Eddie Hung 99267f660f Fix spacing 2019-06-12 09:21:52 -07:00
Eddie Hung 738fdfe8f5 Remove wide mux inference 2019-06-12 09:20:46 -07:00
Eddie Hung f7a9769c14 Merge remote-tracking branch 'origin/master' into xaig 2019-06-12 08:50:39 -07:00
Eddie Hung 02973474df Remove extra newline 2019-06-03 20:04:47 -07:00
Eddie Hung 0ad50332d9 Execute techmap and arith_map simultaneously 2019-06-03 19:36:09 -07:00
Clifford Wolf 04ef222cfb Add "stat -tech xilinx" 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-05-11 09:24:52 +02:00
Clifford Wolf 09467bb9a3 Add "synth_xilinx -arch" 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-05-07 15:04:36 +02:00
Eddie Hung d394b9301b Back to passing all xc7srl tests! 2019-05-01 18:23:21 -07:00
Eddie Hung 31ff0d8ef5 Merge remote-tracking branch 'origin/master' into eddie/synth_xilinx_fine 2019-05-01 18:09:38 -07:00
Marcin Kościelnicki 98e5a625c4 synth_xilinx: Add -nocarry and -nomux options. 2019-04-30 12:54:21 +02:00
Eddie Hung e97178a888 WIP 2019-04-28 12:51:00 -07:00
Eddie Hung d855683917 Revert synth_xilinx 'fine' label more to how it used to be... 2019-04-26 16:53:16 -07:00
Eddie Hung ea0e0722bb Where did this check come from!?! 2019-04-26 15:35:34 -07:00
Eddie Hung 727eec04c5 Refactor synth_xilinx to auto-generate doc 2019-04-26 14:32:18 -07:00
Eddie Hung 0bd2bfa737 Merge remote-tracking branch 'origin/master' into xaig 2019-04-22 18:15:28 -07:00
Eddie Hung ec88129a5c Update help message 2019-04-22 11:38:23 -07:00
Eddie Hung 4883391b63 Merge remote-tracking branch 'origin/master' into xaig 2019-04-22 11:19:52 -07:00
Eddie Hung 0e76718720 Move 'shregmap -tech xilinx' into map_cells 2019-04-22 10:45:39 -07:00