Clifford Wolf
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27b5347a87
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Restored blif "-true - .." behavior, use "-true + .." for eddiehung-vtr behavior
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2016-07-08 11:51:04 +02:00 |
Clifford Wolf
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72149aba2e
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In BLIF, a .names without entries already always outputs 0
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2016-07-08 11:41:26 +02:00 |
Clifford Wolf
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f6b7cf23d6
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Merge branch 'yosys-0.5-vtr' of https://github.com/eddiehung/yosys into eddiehung-vtr
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2016-07-08 11:32:36 +02:00 |
Clifford Wolf
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5ffad4e073
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Added $sop support to BLIF back-end
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2016-06-18 12:28:49 +02:00 |
Clifford Wolf
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d10dfccabb
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Added "write_blif -noalias"
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2016-05-06 15:05:53 +02:00 |
Clifford Wolf
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60ac1bd178
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Added support for "active high" and "active low" latches in BLIF back-end
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2016-04-22 18:00:46 +02:00 |
Clifford Wolf
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0bc95f1e04
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Added "yosys -D" feature
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2016-04-21 23:28:37 +02:00 |
Clifford Wolf
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3920bf58d0
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Fixed some typos
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2016-04-05 08:18:21 +02:00 |
Clifford Wolf
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4393a8ffbf
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Added "write_blif -cname" mode
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2016-01-06 14:32:28 +01:00 |
Clifford Wolf
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eac0bcd7d3
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Improvements in BLIF back-end
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2015-07-29 17:06:19 +02:00 |
Clifford Wolf
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6c84341f22
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Fixed trailing whitespaces
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2015-07-02 11:14:30 +02:00 |
Clifford Wolf
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4c733301e6
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Fixed cstr_buf for std::string with small string optimization
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2015-06-11 13:39:49 +02:00 |
Clifford Wolf
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08a4af3cde
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Improvements in BLIF front-end
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2015-05-24 08:03:21 +02:00 |
eddiehung
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7c62318239
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Fix for all zero mask
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2015-05-03 12:53:09 +01:00 |
eddiehung
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079c1205fe
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Escape '<' and '>' some more
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2015-05-03 10:37:20 +01:00 |
eddiehung
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872e13321c
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For vtr, escape angle brackets as well
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2015-04-28 08:56:00 +01:00 |
eddiehung
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058deb777e
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blifwriter: write out .names for true/false/undef type == '-'
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2015-04-28 08:55:26 +01:00 |
Clifford Wolf
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795a6e1d04
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Added write_blif -attr
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2015-03-02 23:47:45 +01:00 |
Clifford Wolf
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30de490d86
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Fixed another bug in write_blif handling of $lut cells
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2014-12-19 17:54:44 +01:00 |
Clifford Wolf
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b95051fb70
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Fixed writing of $lut cells in BLIF backend
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2014-12-17 11:13:57 +01:00 |
Clifford Wolf
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e01254d824
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Added "write_blif -undef" and support for special "-" true/false/undef type
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2014-12-14 18:00:38 +01:00 |
Clifford Wolf
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59d11978fc
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Added "write_blif -blackbox"
based on code by Eddie Hung from
https://github.com/eddiehung/yosys/commit/1e481661cb4a4
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2014-12-14 17:45:03 +01:00 |
Clifford Wolf
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32dce4a870
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Added "blif -unbuf" feature
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2014-12-14 17:37:46 +01:00 |
Clifford Wolf
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f9a307a50b
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namespace Yosys
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2014-09-27 16:17:53 +02:00 |
Ruben Undheim
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79cbf9067c
|
Corrected spelling mistakes found by lintian
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2014-09-06 08:47:06 +02:00 |
Clifford Wolf
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5dce303a2a
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Changed backend-api from FILE to std::ostream
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2014-08-23 13:54:21 +02:00 |
Clifford Wolf
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b64b38eea2
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Renamed $lut ports to follow A-Y naming scheme
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2014-08-15 14:18:40 +02:00 |
Clifford Wolf
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f092b50148
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Renamed $_INV_ cell type to $_NOT_
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2014-08-15 14:11:40 +02:00 |
Clifford Wolf
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04727c7e0f
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No implicit conversion from IdString to anything else
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2014-08-02 18:58:40 +02:00 |
Clifford Wolf
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b9bd22b8c8
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More cleanups related to RTLIL::IdString usage
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2014-08-02 13:19:57 +02:00 |
Clifford Wolf
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cdae8abe16
|
Renamed port access function on RTLIL::Cell, added param access functions
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2014-07-31 16:38:54 +02:00 |
Clifford Wolf
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7bd2d1064f
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Using log_assert() instead of assert()
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2014-07-28 11:27:48 +02:00 |
Clifford Wolf
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10e5791c5e
|
Refactoring: Renamed RTLIL::Design::modules to modules_
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2014-07-27 11:18:30 +02:00 |
Clifford Wolf
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4c4b602156
|
Refactoring: Renamed RTLIL::Module::cells to cells_
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2014-07-27 01:51:45 +02:00 |
Clifford Wolf
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f9946232ad
|
Refactoring: Renamed RTLIL::Module::wires to wires_
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2014-07-27 01:49:51 +02:00 |
Clifford Wolf
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b7dda72302
|
Changed users of cell->connections_ to the new API (sed command)
git grep -l 'connections_' | xargs sed -i -r -e '
s/(->|\.)connections_\["([^"]*)"\] = (.*);/\1set("\2", \3);/g;
s/(->|\.)connections_\["([^"]*)"\]/\1get("\2")/g;
s/(->|\.)connections_.at\("([^"]*)"\)/\1get("\2")/g;
s/(->|\.)connections_.push_back/\1connect/g;
s/(->|\.)connections_/\1connections()/g;'
|
2014-07-26 15:58:23 +02:00 |
Clifford Wolf
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cc4f10883b
|
Renamed RTLIL::{Module,Cell}::connections to connections_
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2014-07-26 11:58:03 +02:00 |
Clifford Wolf
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6aa792c864
|
Replaced more old SigChunk programming patterns
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2014-07-24 23:10:58 +02:00 |
Clifford Wolf
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c094c53de8
|
Removed RTLIL::SigSpec::optimize()
|
2014-07-23 20:32:28 +02:00 |
Clifford Wolf
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ec923652e2
|
Refactoring {SigSpec|SigChunk}(RTLIL::Wire *wire, ..) constructor -- step 3/3
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2014-07-23 09:52:55 +02:00 |
Clifford Wolf
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a8d3a68971
|
Refactoring {SigSpec|SigChunk}(RTLIL::Wire *wire, ..) constructor -- step 2/3
|
2014-07-23 09:49:43 +02:00 |
Clifford Wolf
|
4b4048bc5f
|
SigSpec refactoring: using the accessor functions everywhere
|
2014-07-22 20:39:37 +02:00 |
Clifford Wolf
|
a233762a81
|
SigSpec refactoring: renamed chunks and width to __chunks and __width
|
2014-07-22 20:39:37 +02:00 |
Clifford Wolf
|
337b461d26
|
Added $lut support to blif backend (by user eddiehung from reddit)
|
2014-02-22 14:25:32 +01:00 |
Clifford Wolf
|
79f8944811
|
Renamed "write_blif -subckt" to "write_blif -icells" and added -gates and -param
|
2014-02-21 10:40:15 +01:00 |
Clifford Wolf
|
28093d9dd2
|
Added "top" attribute to mark top module in hierarchy
|
2013-11-24 05:03:43 +01:00 |
Clifford Wolf
|
295e352ba6
|
Renamed "placeholder" to "blackbox"
|
2013-11-22 15:01:12 +01:00 |
Clifford Wolf
|
1dcb683fcb
|
Write yosys version to output files
|
2013-11-03 21:41:39 +01:00 |
Clifford Wolf
|
0efe16f118
|
Added placeholder check to dfflibmap and cleaned up some other placeholder checks
|
2013-10-31 12:27:07 +01:00 |
Clifford Wolf
|
e9dede01ca
|
Fixed handling of boolean attributes (backends)
|
2013-10-24 11:27:30 +02:00 |