mirror of https://github.com/YosysHQ/yosys.git
Added "write_blif -undef" and support for special "-" true/false/undef type
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@ -42,7 +42,7 @@ struct BlifDumperConfig
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std::string buf_type, buf_in, buf_out;
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std::map<RTLIL::IdString, std::pair<RTLIL::IdString, RTLIL::IdString>> unbuf_types;
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std::string true_type, true_out, false_type, false_out;
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std::string true_type, true_out, false_type, false_out, undef_type, undef_out;
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BlifDumperConfig() : icells_mode(false), conn_mode(false), impltf_mode(false), gates_mode(false), param_mode(false), blackbox_mode(false) { }
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};
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@ -74,8 +74,11 @@ struct BlifDumper
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const char *cstr(RTLIL::SigBit sig)
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{
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if (sig.wire == NULL)
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return sig == RTLIL::State::S1 ? "$true" : "$false";
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if (sig.wire == NULL) {
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if (sig == RTLIL::State::S0) return config->false_type == "-" ? config->false_out.c_str() : "$false";
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if (sig == RTLIL::State::S1) return config->true_type == "-" ? config->true_out.c_str() : "$true";
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return config->undef_type == "-" ? config->undef_out.c_str() : "$undef";
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}
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std::string str = RTLIL::unescape_id(sig.wire->name);
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for (size_t i = 0; i < str.size(); i++)
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@ -138,16 +141,24 @@ struct BlifDumper
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}
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if (!config->impltf_mode) {
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if (!config->false_type.empty())
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f << stringf(".%s %s %s=$false\n", subckt_or_gate(config->false_type),
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config->false_type.c_str(), config->false_out.c_str());
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else
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if (!config->false_type.empty()) {
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if (config->false_type != "-")
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f << stringf(".%s %s %s=$false\n", subckt_or_gate(config->false_type),
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config->false_type.c_str(), config->false_out.c_str());
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} else
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f << stringf(".names $false\n");
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if (!config->true_type.empty())
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f << stringf(".%s %s %s=$true\n", subckt_or_gate(config->true_type),
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config->true_type.c_str(), config->true_out.c_str());
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else
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if (!config->true_type.empty()) {
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if (config->true_type != "-")
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f << stringf(".%s %s %s=$true\n", subckt_or_gate(config->true_type),
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config->true_type.c_str(), config->true_out.c_str());
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} else
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f << stringf(".names $true\n1\n");
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if (!config->undef_type.empty()) {
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if (config->undef_type != "-")
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f << stringf(".%s %s %s=$undef\n", subckt_or_gate(config->undef_type),
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config->undef_type.c_str(), config->undef_out.c_str());
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} else
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f << stringf(".names $undef\n");
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}
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for (auto &cell_it : module->cells_)
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@ -300,7 +311,11 @@ struct BlifBackend : public Backend {
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log("\n");
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log(" -true <cell-type> <out-port>\n");
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log(" -false <cell-type> <out-port>\n");
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log(" use the specified cell types to drive nets that are constant 1 or 0\n");
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log(" -undef <cell-type> <out-port>\n");
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log(" use the specified cell types to drive nets that are constant 1, 0, or\n");
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log(" undefined. when '-' is used as <cell-type>, then <out-port> specifies\n");
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log(" the wire name to be used for the constant signal and no cell driving\n");
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log(" that wire is generated.\n");
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log("\n");
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log("The following options can be useful when the generated file is not going to be\n");
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log("read by a BLIF parser but a custom tool. It is recommended to not name the output\n");
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@ -325,7 +340,7 @@ struct BlifBackend : public Backend {
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log(" write blackbox cells with .blackbox statement.\n");
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log("\n");
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log(" -impltf\n");
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log(" do not write definitions for the $true and $false wires.\n");
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log(" do not write definitions for the $true, $false and $undef wires.\n");
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log("\n");
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}
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virtual void execute(std::ostream *&f, std::string filename, std::vector<std::string> args, RTLIL::Design *design)
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@ -368,6 +383,11 @@ struct BlifBackend : public Backend {
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config.false_out = args[++argidx];
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continue;
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}
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if (args[argidx] == "-undef" && argidx+2 < args.size()) {
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config.undef_type = args[++argidx];
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config.undef_out = args[++argidx];
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continue;
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}
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if (args[argidx] == "-icells") {
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config.icells_mode = true;
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continue;
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