Commit Graph

52 Commits

Author SHA1 Message Date
Hoa Nguyen c1205ebc42 Initialize area stats in stat pass
Currently, the area variables in the stat struct are not initialized.
This caused the area stats occasionally being an erroneous value.

Signed-off-by: Hoa Nguyen <hnpl@google.com>
2024-09-07 21:30:58 -07:00
Martin Povišer 3057c13a66 Improve libparse encapsulation 2024-08-13 18:47:36 +02:00
Emil J. Tywoniak 4b29f64142 cost: add model for techmapped cell count, keep_hierarchy pass with -min_cost parameter 2024-07-29 10:26:02 +02:00
Peter Gadfort 160e3e089a add port statistics to stat command 2024-03-22 09:20:20 -04:00
Ethan Mahintorabi b8a1009de9
Update passes/cmds/stat.cc
Make reporting line more clear about the non cumulative area of sequential cells

Co-authored-by: N. Engelhardt <nakengelhardt@gmail.com>
2024-02-16 07:44:09 -08:00
Ethan Mahintorabi f0df0e3912
update type and variable names
Signed-off-by: Ethan Mahintorabi <ethanmoon@google.com>
2024-02-16 00:01:44 +00:00
Ethan Mahintorabi 2d8343d423
update type and variable names
Signed-off-by: Ethan Mahintorabi <ethanmoon@google.com>
2024-02-15 23:59:19 +00:00
Ethan Mahintorabi 8566489d85
stat: Add sequential area output to stat -liberty
Checks to see if a cell is of type ff in the liberty,
and keeps track of an additional area value.

```
   Chip area for module '\addr': 92.280720
   Sequential area for module '\addr': 38.814720
```

Signed-off-by: Ethan Mahintorabi <ethanmoon@google.com>
2024-02-09 23:51:00 +00:00
Stephen Tong b3e7390c0e
Fix typo in stat help 2024-01-21 16:32:05 -05:00
N. Engelhardt 57897927ff stat: pass down quiet arg 2023-02-28 17:12:55 +01:00
Peter Gadfort 58cca9592d stat: ensure area is included in json output
Signed-off-by: Peter Gadfort <peter.gadfort@gmail.com>
2022-12-29 21:51:46 -05:00
Jannis Harder 7036a312bf stat: Fix JSON output for empty designs 2022-12-02 14:36:19 +01:00
Kamyar Mohajerani 69787f1906 remove extra space in formating 2022-09-22 15:46:36 +01:00
Kamyar Mohajerani bc1e579483 stat: add tech tech-specific utilizations to json
- refactor resource util. estimation/calculations for Xilinx and CMOS
 - don't print log_header if "-json" is set
2022-09-22 15:46:36 +01:00
Lofty 59facfa98c stat: add option for machine-readable json output 2022-08-11 13:41:01 +01:00
N. Engelhardt 61b05051e1 also make 'stat' save counts to scratchpad 2022-06-01 16:01:07 +02:00
Marcelina Kościelnicka 93508d58da Add $bmux and $demux cells. 2022-01-28 23:34:41 +01:00
Marcelina Kościelnicka e7d89e653c Hook up $aldff support in various passes. 2021-10-02 21:01:21 +02:00
Claire Xenia Wolf 72787f52fc Fixing old e-mail addresses and deadnames
s/((Claire|Xen|Xenia|Clifford)\s+)+(Wolf|Xen)\s+<(claire|clifford)@(symbioticeda.com|clifford.at|yosyshq.com)>/Claire Xenia Wolf <claire@yosyshq.com>/gi;
s/((Nina|Nak|N\.)\s+)+Engelhardt\s+<nak@(symbioticeda.com|yosyshq.com)>/N. Engelhardt <nak@yosyshq.com>/gi;
s/((David)\s+)+Shah\s+<(dave|david)@(symbioticeda.com|yosyshq.com|ds0.me)>/David Shah <dave@ds0.me>/gi;
s/((Miodrag)\s+)+Milanovic\s+<(miodrag|micko)@(symbioticeda.com|yosyshq.com)>/Miodrag Milanovic <micko@yosyshq.com>/gi;
s,https?://www.clifford.at/yosys/,http://yosyshq.net/yosys/,g;
2021-06-08 00:39:36 +02:00
N. Engelhardt 3238190797 use the new isPublic() in a few places 2020-09-14 12:43:18 +02:00
Marcelina Kościelnicka b0bee396a8 Add new builtin FF types
The new types include:

- FFs with async reset and enable (`$adffe`, `$_DFFE_[NP][NP][01][NP]_`)
- FFs with sync reset (`$sdff`, `$_SDFF_[NP][NP][01]_`)
- FFs with sync reset and enable, reset priority (`$sdffs`, `$_SDFFE_[NP][NP][01][NP]_`)
- FFs with sync reset and enable, enable priority (`$sdffce`, `$_SDFFCE_[NP][NP][01][NP]_`)
- FFs with async reset, set, and enable (`$dffsre`, `$_DFFSRE_[NP][NP][NP][NP]_`)
- latches with reset or set (`$adlatch`, `$_DLATCH_[NP][NP][01]_`)

The new FF types are not actually used anywhere yet (this is left
for future commits).
2020-06-23 15:40:02 +02:00
whitequark 7191dd16f9 Use C++11 final/override keywords. 2020-06-18 23:34:52 +00:00
Xiretza edd8ff2c07
Add flooring division operator
The $div and $mod cells use truncating division semantics (rounding
towards 0), as defined by e.g. Verilog. Another rounding mode, flooring
(rounding towards negative infinity), can be used in e.g. VHDL. The
new $divfloor cell provides this flooring division.

This commit also fixes the handling of $div in opt_expr, which was
previously optimized as if it was $divfloor.
2020-05-28 22:59:04 +02:00
Xiretza 17163cf43a
Add flooring modulo operator
The $div and $mod cells use truncating division semantics (rounding
towards 0), as defined by e.g. Verilog. Another rounding mode, flooring
(rounding towards negative infinity), can be used in e.g. VHDL. The
new $modfloor cell provides this flooring modulo (also known as "remainder"
in several languages, but this name is ambiguous).

This commit also fixes the handling of $mod in opt_expr, which was
previously optimized as if it was $modfloor.
2020-05-28 22:59:03 +02:00
Alberto Gonzalez b39a0d77ab
Clean up `passes/cmds/stat.cc`. 2020-04-06 04:39:18 +00:00
Eddie Hung 956ecd48f7 kernel: big fat patch to use more ID::*, otherwise ID(*) 2020-04-02 09:51:32 -07:00
Eddie Hung fdafb74eb7 kernel: use more ID::* 2020-04-02 07:14:08 -07:00
Clifford Wolf 338f6765eb Tweak default gate costs, cleanup "stat -tech cmos"
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-08-07 10:25:51 +02:00
Clifford Wolf 023086bd46 Add $_NMUX_, add "abc -g cmos", add proper cmos cell costs
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-08-06 04:47:55 +02:00
Clifford Wolf c6d8692c97 Add "stat -tech cmos"
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-07-20 15:06:28 +02:00
Clifford Wolf 11ec7b2aec Fix typo
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-06-20 12:23:07 +02:00
Clifford Wolf 04ef222cfb Add "stat -tech xilinx"
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-05-11 09:24:52 +02:00
Henner Zeller 3aa4484a3c Consistent use of 'override' for virtual methods in derived classes.
o Not all derived methods were marked 'override', but it is a great
  feature of C++11 that we should make use of.
o While at it: touched header files got a -*- c++ -*- for emacs to
  provide support for that language.
o use YS_OVERRIDE for all override keywords (though we should probably
  use the plain keyword going forward now that C++11 is established)
2018-07-20 23:51:06 -07:00
Edmond Cote d89560a0ba
Include module name for area summary stats
The PR prints the name of the module when displaying the final area count.

Pros:
- Easier for the user to `grep` for area information about a specific module

Cons:
- Arguably more verbose, less "pretty" than author desires

Verification:
~~~~
30c30
<    Chip area for this module: 20616.349000
---
>    Chip area for module '$paramod$d1738fc0bb353d517bc2caf8fef2abb20bced034\picorv32': 20616.349000
70c70
<    Chip area for this module: 88.697700
---
>    Chip area for module '\picorv32_axi_adapter': 88.697700
102c102
<    Chip area for this module: 20705.046700
---
>    Chip area for top module '\picorv32_axi': 20705.046700
~~~~
2018-06-18 17:29:01 -07:00
Clifford Wolf a96c775a73 Add support for "yosys -E"
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-01-07 16:36:13 +01:00
Clifford Wolf c00d8a5b73 Add $alu to list of supported cells for "stat -width" 2017-07-14 11:32:49 +02:00
Clifford Wolf 0bc95f1e04 Added "yosys -D" feature 2016-04-21 23:28:37 +02:00
Clifford Wolf 825b99efc1 Added "stat -liberty" for calculating chip area 2016-02-04 12:26:13 +01:00
Clifford Wolf 207736b4ee Import more std:: stuff into Yosys namespace 2015-10-25 19:30:49 +01:00
Clifford Wolf 6af8076967 improvement in "stat" 2015-10-24 21:56:53 +02:00
Clifford Wolf 6c84341f22 Fixed trailing whitespaces 2015-07-02 11:14:30 +02:00
Clifford Wolf c6ae9ebb79 Fixed "stat" handling of blackbox modules 2015-02-14 22:36:34 +01:00
Clifford Wolf 4569a747f8 Renamed SIZE() to GetSize() because of name collision on Win32 2014-10-10 17:07:24 +02:00
Clifford Wolf 9dea161321 sort cell types in "stat" output by name 2014-10-03 19:21:04 +02:00
Clifford Wolf f9a307a50b namespace Yosys 2014-09-27 16:17:53 +02:00
Clifford Wolf 8927aa6148 Removed $bu0 cell type 2014-09-04 02:07:52 +02:00
Clifford Wolf fff12c719f Added "stat -width" 2014-08-22 17:20:28 +02:00
Clifford Wolf 10e5791c5e Refactoring: Renamed RTLIL::Design::modules to modules_ 2014-07-27 11:18:30 +02:00
Clifford Wolf 4c4b602156 Refactoring: Renamed RTLIL::Module::cells to cells_ 2014-07-27 01:51:45 +02:00
Clifford Wolf f9946232ad Refactoring: Renamed RTLIL::Module::wires to wires_ 2014-07-27 01:49:51 +02:00