Clifford Wolf
67b1026297
Merge pull request #591 from hzeller/virtual-override
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Consistent use of 'override' for virtual methods in derived classes.
2018-08-15 14:05:38 +02:00
Clifford Wolf
e275692e84
Verific: Produce errors for instantiating unknown module
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Because if the unknown module is connected to any constants, Verific will
actually break all constants in the same module, even if they have nothing
to do structurally with that instance of an unknown module.
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-07-22 18:44:05 +02:00
Henner Zeller
3aa4484a3c
Consistent use of 'override' for virtual methods in derived classes.
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o Not all derived methods were marked 'override', but it is a great
feature of C++11 that we should make use of.
o While at it: touched header files got a -*- c++ -*- for emacs to
provide support for that language.
o use YS_OVERRIDE for all override keywords (though we should probably
use the plain keyword going forward now that C++11 is established)
2018-07-20 23:51:06 -07:00
Clifford Wolf
65234d4b24
Fix handling of eventually properties in verific importer
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-07-17 12:43:30 +02:00
Clifford Wolf
5041ed2f7d
Fix verific -vlog-incdir and -vlog-libdir handling
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-07-16 18:47:42 +02:00
Clifford Wolf
f897af626d
Fix "read -incdir"
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-07-16 16:48:09 +02:00
Clifford Wolf
f39b897545
Add "read -incdir"
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-07-16 15:32:26 +02:00
Clifford Wolf
8b92ddb9d2
Fix verific eventually handling
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-06-29 19:24:58 +02:00
Clifford Wolf
0404cf61d5
Add verific support for eventually properties
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-06-29 19:21:04 +02:00
Clifford Wolf
ebf0f003d3
Add "verific -formal" and "read -formal"
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-06-29 10:02:27 +02:00
Clifford Wolf
afedb2d03e
Add "read -sv -D" support
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-06-28 23:58:15 +02:00
Clifford Wolf
07e616900c
Add "read -undef"
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-06-28 23:43:38 +02:00
Clifford Wolf
848c3c5c88
Add YOSYS_NOVERIFIC env variable for temporarily disabling verific
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-06-22 20:40:22 +02:00
Clifford Wolf
d412b17259
Add simplified "read" command, enable extnets in implicit Verific import
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-06-21 16:56:55 +02:00
Clifford Wolf
5f2bc1ce76
Add automatic verific import in hierarchy command
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-06-20 23:45:01 +02:00
Clifford Wolf
4372cf690d
Add (* gclk *) attribute support
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-06-01 13:25:42 +02:00
Clifford Wolf
9a946c207f
Add comment to VIPER #13453 work-around
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-05-28 13:36:35 +02:00
Clifford Wolf
001c9f1d45
Fix Verific handling of single-bit anyseq/anyconst wires
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-05-25 15:41:45 +02:00
Clifford Wolf
251562a491
Fix VerificClocking for cases where Verific generates chains of PRIM_SVA_POSEDGE
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-05-24 18:13:38 +02:00
Clifford Wolf
4d645f0fce
Fix verific handling of anyconst/anyseq attributes
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-05-24 17:07:06 +02:00
Clifford Wolf
a7281930c5
Fix handling of anyconst/anyseq attrs in VHDL code via Verific
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-05-15 19:27:00 +02:00
Clifford Wolf
24e6401617
Further improve handling of zero-length SVA consecutive repetition
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-05-05 14:32:04 +02:00
Clifford Wolf
3e67497ec2
Fix handling of zero-length SVA consecutive repetition
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-05-05 13:58:01 +02:00
Clifford Wolf
617c60cea6
Add PRIM_HDL_ASSERTION support to Verific importer
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-04-07 18:38:42 +02:00
Clifford Wolf
0ac768f9df
Fix handling of $global_clocking in Verific
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-04-06 21:23:47 +02:00
Clifford Wolf
278685b084
Add Verific anyseq/anyconst/allseq/allconst attribute support
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-04-06 14:19:55 +02:00
Clifford Wolf
ab8db2c168
Add "verific -autocover"
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-04-06 14:10:57 +02:00
makaimann
0c404b1f63
Set RAM runtime flags for Verific frontend
2018-04-05 17:38:08 -07:00
Clifford Wolf
93985d91b1
Remove left-over log_ping debug commands.. oops.
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-03-31 14:23:57 +02:00
Clifford Wolf
315d5e32bf
Fix handling of unclocked immediate assertions in Verific front-end
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-03-26 13:04:10 +02:00
Clifford Wolf
e7862d4f64
Update todo for more features to verificsva.cc
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-03-16 15:48:48 +01:00
Clifford Wolf
38596ce68f
Update todo for more features to verificsva.cc
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-03-16 12:16:52 +01:00
Clifford Wolf
462e9f7bd4
Add todo for more features to verificsva.cc
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-03-16 12:15:36 +01:00
Clifford Wolf
7cf9d88028
Improve import of memories via Verific
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-03-15 18:20:37 +01:00
Clifford Wolf
bf402a806a
Fix handling of SV compilation units in Verific front-end
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-03-14 20:22:11 +01:00
Clifford Wolf
307c16a309
Fix SVA handling of NON_CONSECUTIVE_REPEAT and GOTO_REPEAT
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-03-10 16:24:01 +01:00
Clifford Wolf
ce37b6d730
Fix variable name typo in verificsva.cc
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-03-10 14:33:42 +01:00
Clifford Wolf
da216937b1
Add support for trivial SVA sequences and properties
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-03-10 14:32:01 +01:00
Clifford Wolf
a15208f301
Use Verific hier_tree component for elaboration
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-03-08 13:26:33 +01:00
Clifford Wolf
a4bbfd2d15
Fix Verific handling of "assert property (..);" in always block
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-03-07 20:06:02 +01:00
Clifford Wolf
92d5f4db6f
Add "verific -import -V"
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-03-07 19:40:34 +01:00
Clifford Wolf
252627fc54
Set Verific db_preserve_user_nets flag
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-03-07 18:08:03 +01:00
Clifford Wolf
dcc4a18d5a
Update comment about supported SVA in verificsva.cc
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-03-06 15:47:33 +01:00
Clifford Wolf
03b49654b1
Add SVA NON_CONSECUTIVE_REPEAT and GOTO_REPEAT support
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-03-06 15:39:46 +01:00
Clifford Wolf
7bb83ae9f2
Add SVA first_match() support
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-03-06 15:06:35 +01:00
Clifford Wolf
78f2cca2d9
Add SVA within support
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-03-06 14:41:27 +01:00
Clifford Wolf
5555292ce2
Add support for SVA sequence intersect
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-03-06 14:26:57 +01:00
Clifford Wolf
d86e875f0f
Add get_fsm_accept_reject for parsing SVA properties
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-03-06 11:50:38 +01:00
Clifford Wolf
588ce0e34a
Simplified SVA "until" handling
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-03-06 01:51:42 +01:00
Clifford Wolf
480e8e676a
Add proper SVA seq.triggered support
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-03-04 19:29:26 +01:00