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Fix VerificClocking for cases where Verific generates chains of PRIM_SVA_POSEDGE 

Signed-off-by: Clifford Wolf <clifford@clifford.at>
This commit is contained in:
Clifford Wolf 2018-05-24 18:13:38 +02:00
parent 4d645f0fce
commit 251562a491
1 changed files with 1 additions and 1 deletions
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2
frontends/verific/verific.cc
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@ -1393,7 +1393,7 @@ VerificClocking::VerificClocking(VerificImporter *importer, Net *net, bool sva_a
return;
}
if (inst != nullptr && inst->Type() == PRIM_SVA_POSEDGE)
while (inst != nullptr && inst->Type() == PRIM_SVA_POSEDGE)
{
net = inst->GetInput();
inst = net->Driver();;