riscv
/
yosys
mirror of https://github.com/YosysHQ/yosys.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity
12,913 Commits 92 Branches 49 Tags 39 MiB
Commit Graph

12913 Commits

Author SHA1 Message Date
Lofty 77327b2544 sta: very crude static timing analysis pass 
Co-authored-by: Eddie Hung <eddie@fpgeh.com>
 2021-11-25 17:20:27 +01:00
github-actions[bot] 113c943841 Bump version 2021-11-18 00:54:02 +00:00
Miodrag Milanović d0fda4c0ef
Merge pull request #3080 from YosysHQ/micko/init_wire 
Give initial wire unique ID, fixes #2914
 2021-11-17 13:57:56 +01:00
Miodrag Milanovic c081c683a4 Give initial wire unique ID, fixes #2914 2021-11-17 12:19:06 +01:00
github-actions[bot] 07dde32bf1 Bump version 2021-11-17 00:53:07 +00:00
Kamil Rakoczy fdb19a5b3a
Support parameters using struct as a wiretype (#3050) 
Signed-off-by: Kamil Rakoczy <krakoczy@antmicro.com>
 2021-11-16 10:59:54 +01:00
github-actions[bot] 06bddb5e49 Bump version 2021-11-14 00:54:56 +00:00
Patrick Urban cb41209095 synth_gatemate Revert cascade A/B port mixup 2021-11-13 21:53:25 +01:00
Patrick Urban decdc743db synth_gatemate: Remove iob_map invokation 2021-11-13 21:53:25 +01:00
Patrick Urban 0d871b6c49 synth_gatemate: Add block RAM cascade support 
* add simulation model for block RAM cascade in 40K mode
* limit 20K_SDP and 40K_SDP to 40 and 80 bits (the only useful configurations)
 2021-11-13 21:53:25 +01:00
Patrick Urban 285ec0547b synth_gatemate: Remove obsolete iob_map 2021-11-13 21:53:25 +01:00
Patrick Urban 81964d6d6f synth_gatemate: Update pass 
* remove `write_edif` and `write_blif` options
* remove redundant `abc` call before muxcover
* update style
 2021-11-13 21:53:25 +01:00
Patrick Urban 74aee88e81 synth_gatemate: Remove specify blocks 2021-11-13 21:53:25 +01:00
Patrick Urban 05f24adca9 synth_gatemate: Remove gatemate_bramopt pass 2021-11-13 21:53:25 +01:00
Patrick Urban 97d03c2b3b synth_gatemate: Apply new test practice with assert-max 2021-11-13 21:53:25 +01:00
Patrick Urban 76bf96d310 synth_gatemate: Fix fsm test 2021-11-13 21:53:25 +01:00
Patrick Urban 4bee908ae8 synth_gatemate: Revise block RAM read modes and initialization 
* enable mixed read-width / write-width ports in SDP mode
* fix NO_CHANGE and WRITE_THROUGH behavior during read access
* remove redundant zero-initialization
* set A/B_WE bit during map (gatemate_bramopt pass could be removed later)
* differentiate "upper" and "lower" initialization for cascade mode
 2021-11-13 21:53:25 +01:00
Patrick Urban 3f4ccdf2f5 synth_gatemate: Remove unsupported FF initialization 2021-11-13 21:53:25 +01:00
Patrick Urban d592bd93b8 synth_gatemate: Rename multiplier factor parameters 2021-11-13 21:53:25 +01:00
Patrick Urban 6825de6343 synth_gatemate: Registers are uninitialized 2021-11-13 21:53:25 +01:00
Patrick Urban acb993b27b Allow initial blocks to be disabled during tests 
Wrap initial blocks with a NO_INIT so that tests for archs without register initialization feature don't fail.
 2021-11-13 21:53:25 +01:00
Patrick Urban 0a72952d5f synth_gatemate: Apply review remarks 
* remove unused techmap models in `map_regs.v`
* replace RAM initilization loops with 320-bit-writes
* add script to test targets in top-level Makefile
* remove `MAXWIDTH` parameter and treat both vector widths individually in `mult_map.v`
* iterate over all modules in `gatemate_bramopt` pass
 2021-11-13 21:53:25 +01:00
Patrick Urban cfcc38582a synth_gatemate: Apply review remarks 2021-11-13 21:53:25 +01:00
Patrick Urban 240d289fff synth_gatemate: Initial implementation 
Signed-off-by: Patrick Urban <patrick.urban@web.de>
 2021-11-13 21:53:25 +01:00
github-actions[bot] b3e2001e1f Bump version 2021-11-13 00:52:01 +00:00
Marcelina Kościelnicka 107aad2cd2 show: Fix wire bit indexing. 
Fixes #3078.
 2021-11-12 15:09:58 +01:00
Miodrag Milanovic 48a628522b update abc 2021-11-12 12:40:24 +01:00
Miodrag Milanovic b4f68e3cca Update abc 2021-11-12 09:00:32 +01:00
github-actions[bot] 1df8ac58fe Bump version 2021-11-11 00:54:18 +00:00
Claire Xen a6c90c9772
Merge pull request #3075 from YosysHQ/micko/verific_mem_size 
No need to allocate more memory than used
 2021-11-10 20:24:00 +01:00
Claire Xen 4699ddcc1b
Merge pull request #3077 from YosysHQ/claire/genlib 
Add genlib support to ABC command
 2021-11-10 20:02:34 +01:00
Claire Xen c77d5a2aac
Spelling fix in abc.cc 2021-11-10 16:47:54 +01:00
Claire Xenia Wolf 093e287a1e Add genlib support to ABC command 
Signed-off-by: Claire Xenia Wolf <claire@clairexen.net>
 2021-11-10 16:40:54 +01:00
Marcelina Kościelnicka 506acd52de iopadmap: Fix ebmarassing typo 2021-11-10 14:56:03 +01:00
Miodrag Milanovic 15a35f5584 No need to alocate more memory than used 2021-11-10 10:50:44 +01:00
github-actions[bot] 224c6f8664 Bump version 2021-11-10 00:54:39 +00:00
Kamil Rakoczy f4f5acf396 genrtlil: Fix displaying debug info in packages 
Signed-off-by: Kamil Rakoczy <krakoczy@antmicro.com>
 2021-11-10 01:31:39 +01:00
Marcelina Kościelnicka 15b0d717ed iopadmap: Add native support for negative-polarity output enable. 2021-11-09 15:40:16 +01:00
github-actions[bot] 4871d8f199 Bump version 2021-11-09 00:53:27 +00:00
Miodrag Milanović cd71d260ea
Update CODEOWNERS 2021-11-08 16:59:45 +01:00
Miodrag Milanović cd3f3d5df0
Limit macOS GH actions 2021-11-08 16:56:24 +01:00
github-actions[bot] d39d4e11d2 Bump version 2021-11-08 00:53:20 +00:00
Pepijn de Vos 4bf8deacbb
synth_gowin: move splitnets to after iopadmap (#2435) 2021-11-07 18:00:18 +01:00
Gabriel Somlo 9a413803eb manual: fix pdflatex inputenc undefined char error 
Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
 2021-11-07 03:05:03 +01:00
Pepijn de Vos a3eec687e0 Remove noalu from synth_gowin json output as Apicula now supports it 2021-11-07 03:04:21 +01:00
github-actions[bot] 781cf13abd Bump version 2021-11-07 00:54:38 +00:00
Pepijn de Vos 0c7461fe5e
gowin: widelut support (#3042) 2021-11-06 16:09:30 +01:00
github-actions[bot] 8f08908d8d Bump version 2021-11-06 00:51:08 +00:00
Miodrag Milanovic a28ee81be0 Next dev cycle 2021-11-05 12:52:24 +01:00
Miodrag Milanovic 360fed8e4d Release version 0.11 2021-11-05 12:47:38 +01:00