Clifford Wolf
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839af272ad
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Improved setundef random number generator
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2014-01-18 02:56:36 +01:00 |
Clifford Wolf
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091d9abc3e
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Added setundef command
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2014-01-17 23:14:36 +01:00 |
Clifford Wolf
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548d5aafa4
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Some improvements in log_dump_val_worker() templates
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2014-01-17 23:14:17 +01:00 |
Clifford Wolf
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db9cf544b8
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Added techlibs/common/pmux2mux.v
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2014-01-17 20:06:15 +01:00 |
Ahmed Irfan
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9a689f33a5
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verilog default options pull
shift operator width issues
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2014-01-17 19:32:35 +01:00 |
Ahmed Irfan
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fc3f2961be
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Merge branch 'master' of https://github.com/ahmedirfan1983/yosys into btor
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2014-01-17 19:07:41 +01:00 |
Ahmed Irfan
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f2ee57f798
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Merge pull request #4 from cliffordwolf/master
verilog defaults
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2014-01-17 10:07:05 -08:00 |
Clifford Wolf
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6170cfe9cd
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Added verilog_defaults command
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2014-01-17 17:22:29 +01:00 |
Clifford Wolf
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2e370d5a2f
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Added support for $adff with undef data inputs to opt_rmdff
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2014-01-17 16:42:40 +01:00 |
Clifford Wolf
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651ce67d97
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Added select -assert-none and -assert-any
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2014-01-17 16:34:50 +01:00 |
Ahmed Irfan
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be7707c5cf
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Merge branch 'master' of https://github.com/ahmedirfan1983/yosys into btor
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2014-01-17 10:50:59 +01:00 |
Ahmed Irfan
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2d7bcaf2f2
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Merge pull request #3 from cliffordwolf/master
memory_unpack
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2014-01-17 01:48:55 -08:00 |
Clifford Wolf
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f3154f5694
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Added automatic memid generation to memory_unpack command
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2014-01-17 00:15:15 +01:00 |
Clifford Wolf
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4d8318ad1b
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Added memory_unpack command
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2014-01-17 00:05:02 +01:00 |
Ahmed Irfan
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c7a2e582aa
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slice error corrected
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2014-01-16 20:16:01 +01:00 |
Ahmed Irfan
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3a1490888d
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width issues
dff cell for more than one registers
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2014-01-15 17:36:33 +01:00 |
Ahmed Irfan
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8661626157
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Merge branch 'master' of https://github.com/ahmedirfan1983/yosys into btor
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2014-01-15 11:26:44 +01:00 |
Ahmed Irfan
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66198d8591
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Merge pull request #2 from cliffordwolf/master
hierarchy
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2014-01-15 02:20:34 -08:00 |
Clifford Wolf
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11c7df40c3
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Merge pull request #20 from mschmoelzer/master
Include unistd.h in passes/hierarchy/hierarchy.cc (required for access(3))
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2014-01-14 11:51:28 -08:00 |
Martin Schmölzer
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aa17f16fec
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Include unistd.h in passes/hierarchy/hierarchy.cc (required for access(3))
This fixes compilation errors on Arch Linux.
Signed-off-by: Martin Schmölzer <martin.schmoelzer@student.tuwien.ac.at>
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2014-01-14 20:12:45 +01:00 |
Clifford Wolf
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0c5b1f32d4
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Added hierarchy -libdir option
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2014-01-14 19:28:20 +01:00 |
Clifford Wolf
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9a00980129
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renamed LibertyParer to LibertyParser
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2014-01-14 18:57:47 +01:00 |
Clifford Wolf
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c1da7661a5
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Added "+" to list of liberty token characters
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2014-01-14 18:56:29 +01:00 |
Ahmed Irfan
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661b5a993e
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BTOR backend
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2014-01-14 12:03:53 +01:00 |
Ahmed Irfan
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1091c24d00
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Merge branch 'master' of https://github.com/ahmedirfan1983/yosys into btor
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2014-01-14 11:25:06 +01:00 |
Ahmed Irfan
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b4ce7fee06
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Merge pull request #1 from cliffordwolf/master
Added "opt_const -mux_undef"
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2014-01-14 02:22:10 -08:00 |
Clifford Wolf
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54275c61ee
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Added "opt_const -mux_undef"
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2014-01-14 11:10:29 +01:00 |
Clifford Wolf
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a3d94bf888
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Fixed typo in frontends/ast/simplify.cc
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2014-01-12 21:04:42 +01:00 |
Clifford Wolf
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bc541b47ea
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Improved performance of freduce input cone reduction
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2014-01-04 13:10:51 +01:00 |
Clifford Wolf
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b791af174e
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Improved freduce performance on const signals
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2014-01-04 00:06:36 +01:00 |
Clifford Wolf
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10f45b8c8e
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Performance improvements in freduce pass
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2014-01-03 21:29:28 +01:00 |
Clifford Wolf
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c44e1bec6d
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More freduce cleanups
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2014-01-03 18:17:28 +01:00 |
Clifford Wolf
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8f11eaaca6
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Added updating of RTLIL::autoidx to ilang frontend
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2014-01-03 17:51:05 +01:00 |
Clifford Wolf
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03f0ab9de2
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Cleanups in freduce command
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2014-01-03 17:50:39 +01:00 |
Clifford Wolf
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7354a1718e
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Fixed SAT and ConstEval undef handling for $pmux and $safe_pmux
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2014-01-03 17:30:50 +01:00 |
Clifford Wolf
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8a8d444648
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Tiny cleanup in proc_mux.cc
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2014-01-03 16:54:59 +01:00 |
Ahmed Irfan
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09f16c9d0c
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splitnet -driver feature
Merge branch 'master' of https://github.com/cliffordwolf/yosys into btor
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2014-01-03 16:54:32 +01:00 |
Clifford Wolf
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60fbca9970
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Added "splitnets -driver"
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2014-01-03 14:01:06 +01:00 |
Clifford Wolf
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bf5e5429c1
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Use selection in freduce command
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2014-01-03 13:15:11 +01:00 |
Clifford Wolf
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c3e9f0712f
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Another small freduce cleanup/bugfix
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2014-01-03 12:34:18 +01:00 |
Clifford Wolf
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914e208aa3
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Added "connect" command
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2014-01-03 12:33:00 +01:00 |
Ahmed Irfan
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06482c046b
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Merge branch 'master' of https://github.com/cliffordwolf/yosys into btor
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2014-01-03 10:54:54 +01:00 |
Ahmed Irfan
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5da334fc2e
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makefile
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2014-01-03 10:54:30 +01:00 |
Ahmed Irfan
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ffd768ce86
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btor
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2014-01-03 10:52:44 +01:00 |
Clifford Wolf
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67d155078d
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More freduce cleanups and bugfixes
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2014-01-03 02:44:05 +01:00 |
Clifford Wolf
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eec2cd1e78
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Added RTLIL::SigSpec::optimized() API
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2014-01-03 02:43:31 +01:00 |
Clifford Wolf
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fb2bf934dc
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Added correct handling of $memwr priority
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2014-01-03 00:22:17 +01:00 |
Clifford Wolf
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536e20bde1
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Fixed more complex undef cases in freduce
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2014-01-02 23:40:20 +01:00 |
Clifford Wolf
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5a0f561d9c
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Now */ is optional in */<mode>:<arg> selections
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2014-01-02 20:35:37 +01:00 |
Clifford Wolf
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456ae31a8a
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Added "rename -hide" command
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2014-01-02 20:23:34 +01:00 |