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5223 Commits

Author SHA1 Message Date
Clifford Wolf 2faa1d0e80 Enable Verific flag veri_elaborate_top_level_modules_having_interface_ports, fixes #1055 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-05-30 10:04:26 +02:00
Clifford Wolf 0df8a3b461
Merge pull request #1057 from mmicko/fix_478 
Aded one more load of .conf to support change of prefix
 2019-05-30 09:58:51 +02:00
Miodrag Milanovic 14bd40cd3d Aded one more load of .conf to support change of prefix 2019-05-29 18:57:03 +02:00
Clifford Wolf 349c47250a
Merge pull request #1049 from YosysHQ/clifford/fix1047 
Do not use shiftmul peepopt pattern when mul result is truncated
 2019-05-28 19:02:26 +02:00
Clifford Wolf 8e647901ef
Merge pull request #1050 from YosysHQ/clifford/wandwor 
Refactored wand/wor support
 2019-05-28 17:42:16 +02:00
Clifford Wolf cb285e4b87 Do not use shiftmul peepopt pattern when mul result is truncated, fixes #1047 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-05-28 17:17:56 +02:00
Clifford Wolf 49d641d97f
Merge pull request #1048 from mmicko/fix_enable_pyosys 
Moved pyosys block in Makefile
 2019-05-28 16:52:40 +02:00
Clifford Wolf ba2185ead8 Refactor hierarchy wand/wor handling 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-05-28 16:43:25 +02:00
Clifford Wolf e3ebac44df Add actual wandwor test that is part of "make test" 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-05-28 16:42:50 +02:00
Clifford Wolf eaae0adf57 Merge branch 'wandwor' of https://github.com/thasti/yosys into clifford/wandwor 2019-05-28 15:45:15 +02:00
Miodrag Milanovic 040b06cb37 Remove info line in 2nd load of conf file 2019-05-28 15:43:27 +02:00
Miodrag Milanovic 1575d962fa Moved pyosys block in Makefile 2019-05-28 14:53:07 +02:00
Clifford Wolf 2a11c48782
Merge pull request #1045 from mmicko/afl-gcc-target 
afl-fuzzer compile config
 2019-05-28 14:00:28 +02:00
Miodrag Milanovic 1bbcd277fb make config-afl-gcc to help creating conf file 2019-05-27 20:43:10 +02:00
Miodrag Milanovic 2ccbfc8d38 Added afl-gcc as target for fuzzer 2019-05-27 20:38:44 +02:00
Stefan Biereigel 816082d5a1
Merge branch 'master' into wandwor 2019-05-27 19:07:46 +02:00
Stefan Biereigel f68b658b4b reformat wand/wor test 2019-05-27 18:45:54 +02:00
Stefan Biereigel c5fe04acfd remove port direction workaround from test case 2019-05-27 18:10:39 +02:00
Stefan Biereigel 7f11a73210 update README.md with wand/wor information 2019-05-27 18:07:12 +02:00
Stefan Biereigel cd12f2ddcf remove leftovers from ast data structures 2019-05-27 18:01:44 +02:00
Stefan Biereigel ed625a3102 move wand/wor resolution into hierarchy pass 2019-05-27 18:00:22 +02:00
Clifford Wolf 92dde319fc
Merge pull request #1044 from mmicko/invalid_width_range 
Give error instead of asserting for invalid range, fixes #947
 2019-05-27 13:26:12 +02:00
Clifford Wolf 40a070e269
Merge pull request #1043 from mmicko/unsized_constant 
Added support for unsized constants, fixes #1022
 2019-05-27 13:25:52 +02:00
Clifford Wolf 2a9c68e2d6
Merge pull request #1026 from YosysHQ/clifford/fix1023 
Keep zero-width wires in opt_clean if and only if they are ports
 2019-05-27 13:24:19 +02:00
Clifford Wolf da140dd260
Merge pull request #1030 from Kmanfi/makefile_osx 
OS X related Makefile fixes.
 2019-05-27 13:22:51 +02:00
Miodrag Milanovic 84ffb21708 Give error instead of asserting for invalid range, fixes #947 2019-05-27 12:25:18 +02:00
Miodrag Milanovic 34417ce55f Added support for unsized constants, fixes #1022 
Includes work from @sumit0190 and @AaronKel
 2019-05-27 11:42:10 +02:00
Kaj Tuomi 90d070d294 Guard all Python-api related items. 2019-05-27 11:31:50 +03:00
Clifford Wolf 2058c7c53b
Merge pull request #1035 from YosysHQ/eddie/opt_rmdff 
opt_rmdff to work on $dffe and $_DFFE_*
 2019-05-26 11:44:31 +02:00
Clifford Wolf ba92721613
Merge pull request #1042 from mmicko/git_ignore_python 
Add files to ignore for python build
 2019-05-26 10:40:40 +02:00
Miodrag Milanovic ece551eaff Add files to ignore for python build 2019-05-26 09:31:43 +02:00
Eddie Hung d4fb6cac7c Revert enable check 2019-05-25 12:55:57 -07:00
Clifford Wolf a90eec12c9
Merge pull request #1041 from YosysHQ/clifford/fix1040 
Fix handling of offset and upto module ports in write_blif
 2019-05-25 19:17:05 +02:00
Clifford Wolf 6352df42ae Fix handling of offset and upto module ports in write_blif, fixes #1040 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-05-25 17:45:14 +02:00
Eddie Hung f3e86e06e6 Fix init 2019-05-24 18:43:26 -07:00
Eddie Hung e1cb1bb948 Fix typos 2019-05-24 18:34:27 -07:00
Eddie Hung d15da4bc11 Add more tests 2019-05-24 18:33:18 -07:00
Eddie Hung 4bd9465ed3 Call proc 2019-05-24 18:32:02 -07:00
Eddie Hung 822d0b7789 opt_rmdff to optimise even in presence of enable signal, even removing 2019-05-24 18:30:51 -07:00
Eddie Hung f0c6b73b72 Fix duplicate driver 2019-05-24 17:44:57 -07:00
Eddie Hung 0d66103cbb Add comments 2019-05-24 16:33:10 -07:00
Eddie Hung 357b1de6bc Resolve @cliffordwolf review, set even if !has_init 2019-05-24 16:15:22 -07:00
Clifford Wolf b7dd7c2dcd Add proper error message for btor recursion_guard 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-05-24 16:22:34 +02:00
Eddie Hung 67a4850e35
Merge pull request #1036 from YosysHQ/eddie/xilinx_dram 
Add "min bits" and "min wports" to xilinx dram rules
 2019-05-23 13:13:10 -07:00
Eddie Hung 5ac7e38d0a Fix spacing 2019-05-23 12:58:30 -07:00
Eddie Hung 99a3fee8f4 Add "min bits" and "min wports" to xilinx dram rules 2019-05-23 11:32:28 -07:00
Eddie Hung 47f9ea142f Add opt_rmdff tests 2019-05-23 11:26:38 -07:00
Eddie Hung 50ed34a6d0 opt_rmdff to work on $dffe and $_DFFE_* 2019-05-23 11:26:18 -07:00
Stefan Biereigel 85de9d26c1 fix assignment of non-wires 2019-05-23 17:55:56 +02:00
Stefan Biereigel c2caf85f7c add simple test case for wand/wor 2019-05-23 13:57:27 +02:00