github-actions[bot]
2f901a8297
Bump version
2023-08-28 00:15:18 +00:00
Krystine Sherwin
70c47690b3
Updating todo text and assorted fixes
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Fix #3905 by removing emoji (and move the comment into the if block for less ambiguity).
Adds `latexmk` to README.
Note that latexpdf doesn't seem to like `cmd:ref` links, possibly because the
reference location is inside a latex comment block, but I was under the
impression that there was a reference location in there previously which was
working fine. May be related to how the `cmd:def` block expands (or doesn't as
the case may be).
2023-08-28 10:09:43 +12:00
Krystine Sherwin
aad8a3b959
Rearrange command ordering and model checking
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Now under the yosys flows section.
2023-08-28 10:02:06 +12:00
Daniel Gröber
e4189ddfd1
Fix fstGetUint32 crash on mips64el due to misaligned access
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See https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=1025307
2023-08-27 15:05:41 +02:00
Jannis Harder
86df114a33
Merge pull request #3904 from DanielG/fix-fst-i386
2023-08-27 12:14:17 +02:00
Daniel Gröber
e017f6603c
Fix i386 FP excess-precision issue in fstapi ( Fixes : #3898 )
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Likely related to https://gcc.gnu.org/bugzilla/show_bug.cgi?id=323#c225
Thanks to @jix for digging this up
2023-08-27 11:32:53 +02:00
github-actions[bot]
de54cf1a0c
Bump version
2023-08-26 00:13:58 +00:00
Miodrag Milanović
c6caadfed4
Merge pull request #3902 from YosysHQ/krys/yw_join
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yosys-witness concat yw trace files
2023-08-25 15:21:44 +02:00
Miodrag Milanović
1b6d803877
Merge pull request #3900 from YosysHQ/micko/synth_lattice
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Create unified synth_lattice
2023-08-25 12:44:30 +02:00
Miodrag Milanovic
0756285710
enable more primitives supported with nextpnr
2023-08-25 11:45:25 +02:00
Miodrag Milanovic
3b9ebfa672
Addressed code review comments
2023-08-25 11:10:20 +02:00
Miodrag Milanovic
541c1ab567
add script for blackbox extraction
2023-08-23 11:51:00 +02:00
Miodrag Milanovic
ea50d96135
fixed tests
2023-08-23 10:54:29 +02:00
Miodrag Milanovic
75fd706487
delete machxo2 since it is now supported in lattice
2023-08-23 10:54:17 +02:00
Miodrag Milanovic
e3c15f003e
Create synth_lattice
2023-08-23 10:53:21 +02:00
Miodrag Milanovic
a8809989c4
ecp5_gsr -> lattice_gsr, change opt_lut_ins to accept lattice as tech
2023-08-22 10:50:11 +02:00
github-actions[bot]
6405bbab1e
Bump version
2023-08-18 00:14:07 +00:00
Asherah Connor
4a475fa7a2
cxxrtl: include iostream when prints are used
2023-08-17 07:08:22 +02:00
Ethan Mahintorabi
d525a41497
abc: Exposes dont_use flag in ABC
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ABC's read_lib command has a dont_use
cell list that is configurable by the user.
This PR exposes that option to Yosys.
See
5405d4787a/src/map/scl/scl.c (L285)
for documentation on this option.
Signed-off-by: Ethan Mahintorabi <ethanmoon@google.com>
2023-08-15 20:03:46 +00:00
github-actions[bot]
cbd3ff2d3a
Bump version
2023-08-15 00:14:23 +00:00
Miodrag Milanović
316200493e
Merge pull request #3889 from povik/cellaigs-fix-gcc9-build
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cellaigs: Drop initializer list in call to `IdString::in`
2023-08-14 16:05:57 +02:00
Martin Povišer
6d9cd16fad
cellaigs: Drop initializer list in call to `IdString::in`
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Remove superfluous curly braces in call to IdString::in to address
a compilation error (reproduced below) under GCC 9 and earlier.
kernel/cellaigs.cc:395:18: error: call to member function 'in' is ambiguous
if (cell->type.in({ID($gt), ID($ge)}))
~~~~~~~~~~~^~
./kernel/rtlil.h:383:8: note: candidate function
bool in(const std::string &rhs) const { return *this == rhs; }
^
./kernel/rtlil.h:384:8: note: candidate function
bool in(const pool &rhs) const { return rhs.co...
^
2023-08-14 11:42:19 +02:00
Krystine Sherwin
e2c0f8fc50
Some tidy up
2023-08-14 12:13:29 +12:00
github-actions[bot]
008b725c1d
Bump version
2023-08-13 00:15:02 +00:00
Charlotte
d130f7fca2
tests: use /usr/bin/env for bash.
2023-08-12 11:59:39 +10:00
Charlotte
860e3e4056
proc_clean: only consider fully-defined switch operands too.
2023-08-12 02:46:31 +02:00
Charlotte
bf84861fc2
proc_clean: only consider fully-defined case operands.
2023-08-12 02:46:31 +02:00
github-actions[bot]
40978971f4
Bump version
2023-08-12 00:13:32 +00:00
Charlotte
2829cd9caa
cxxrtl_backend: move sync $print grouping out of dump into analyze
2023-08-11 04:46:52 +02:00
Charlotte
ce245b5105
cxxrtl_backend: respect sync `$print` priority
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We add a new flow graph node type, PRINT_SYNC, as they don't get handled
with regular CELL_EVALs. We could probably move this grouping out of
the dump method.
2023-08-11 04:46:52 +02:00
Charlotte
04582f2fb7
verilog_backend: emit sync `$print` cells with same triggers together
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Sort by PRIORITY, ensuring output order.
2023-08-11 04:46:52 +02:00
Charlotte
f9d38253c5
ast: add `PRIORITY` to `$print` cells
2023-08-11 04:46:52 +02:00
Charlotte
4ffdee65e0
cxxrtl: store comb $print cell last EN/ARGS in module
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statics were obviously wrong -- may be multiple instantiations of any
given module. Extend test to cover this.
2023-08-11 04:46:52 +02:00
Charlotte
843ad9331b
cxxrtl: WIP: adjust comb display cells to only fire on change
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Naming and use of statics to be possibly revised.
2023-08-11 04:46:52 +02:00
Charlotte
7f7c61c9f0
fmt: remove lzero by lowering during Verilog parse
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See https://github.com/YosysHQ/yosys/pull/3721#issuecomment-1502037466
-- this reduces logic within the cell, and makes the rules that apply
much more clear.
2023-08-11 04:46:52 +02:00
Charlotte
eb0fb4d662
tests: -std=c++11 not optional
2023-08-11 04:46:52 +02:00
Charlotte
992a728ec7
tests: CXX may be e.g. gcc, so use CC and link stdc++ explicitly
2023-08-11 04:46:52 +02:00
Charlotte
4e94f62116
simlib: blackbox `$print` cell
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It's possible to `generate` the appropriate always blocks per the
triggers, but unlikely to be worth parsing the RTLIL \FORMAT parameter.
2023-08-11 04:46:52 +02:00
Charlotte
fc0acd0ad1
cxxrtl: restrict -print-output to cout, cerr
2023-08-11 04:46:52 +02:00
Charlotte
f9b149fa7b
cxxrtl: add "-print-output" option, test in fmt
2023-08-11 04:46:52 +02:00
Charlotte
bfa8b631bf
cxxrtl: remove unused signedDivideWithRemainder
2023-08-11 04:46:52 +02:00
Charlotte
a1de898fcc
fmt: merge fuzzers since we don't rely on BigInteger logic
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This is per fmt's (effective) use, as it turns out, so we're not losing
any fidelity in the comparison.
2023-08-11 04:46:52 +02:00
Charlotte
3571bf2c2d
fmt: fuzz, remove some unnecessary busywork
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Removing some signed checks and logic where we've already guaranteed the
values to be positive. Indeed, in these cases, if a negative value got
through (per my realisation in the signed fuzz harness), it would cause
an infinite loop due to flooring division.
2023-08-11 04:46:52 +02:00
Charlotte
2ae551c0af
fmt: fuzz, fix (remove extraneous + incorrect fill)
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"blk + chunks" is often an overrun, plus the fill is unnecessary; we
throw blk away immediately.
2023-08-11 04:46:52 +02:00
Charlotte
9f9561379b
fmt: format %t consistently at initial
2023-08-11 04:46:52 +02:00
Charlotte
c391ee7a0d
docs: document simulation time format specifiers
2023-08-11 04:46:52 +02:00
Charlotte
75b44f21d1
fmt: rudimentary %m support (= %l)
2023-08-11 04:46:52 +02:00
Charlotte
c382d7d3ac
fmt: %t/$time support
2023-08-11 04:46:52 +02:00
Charlotte
52dc397a50
cxxrtl: don't use signed divide with unsigned/pos values
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Incorrect for unsigned, wasted effort for positive signed.
2023-08-11 04:46:52 +02:00
Charlotte
b0f69f2cd5
tests: test cxxrtl against iverilog (and uncover bug!)
2023-08-11 04:46:52 +02:00