mirror of https://github.com/YosysHQ/yosys.git
tests: CXX may be e.g. gcc, so use CC and link stdc++ explicitly
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@ -700,7 +700,7 @@ struct AST_INTERNAL::ProcessGenerator
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sstr << ast->str << "$" << ast->filename << ":" << ast->location.first_line << "$" << (autoidx++);
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RTLIL::Cell *cell = current_module->addCell(sstr.str(), ID($print));
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cell->attributes[ID::src] = stringf("%s:%d.%d-%d.%d", ast->filename.c_str(), ast->location.first_line, ast->location.first_column, ast->location.last_line, ast->location.last_column);
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set_src_attr(cell, ast);
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RTLIL::SigSpec triggers;
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RTLIL::Const polarity;
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@ -719,7 +719,7 @@ struct AST_INTERNAL::ProcessGenerator
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cell->setPort(ID::TRG, triggers);
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Wire *wire = current_module->addWire(sstr.str() + "_EN", 1);
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wire->attributes[ID::src] = stringf("%s:%d.%d-%d.%d", ast->filename.c_str(), ast->location.first_line, ast->location.first_column, ast->location.last_line, ast->location.last_column);
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set_src_attr(wire, ast);
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cell->setPort(ID::EN, wire);
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proc->root_case.actions.push_back(SigSig(wire, false));
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@ -48,7 +48,7 @@ test_roundtrip bin_unsigned -DBASE_HEX -DSIGN=""
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test_roundtrip bin_signed -DBASE_HEX -DSIGN="signed"
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../../yosys -p "read_verilog always_full.v; write_cxxrtl -print-output std::cerr yosys-always_full.cc"
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${CXX:-g++} -o yosys-always_full -I../.. always_full_tb.cc
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${CC:-gcc} -o yosys-always_full -I../.. always_full_tb.cc -lstdc++
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./yosys-always_full 2>yosys-always_full.log
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iverilog -o iverilog-always_full always_full.v always_full_tb.v
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./iverilog-always_full | awk '/<<<BEGIN>>>/,/<<<END>>>/ {print $0}' >iverilog-always_full.log
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@ -56,7 +56,7 @@ diff iverilog-always_full.log yosys-always_full.log
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../../yosys -p "read_verilog display_lm.v" >yosys-display_lm.log
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../../yosys -p "read_verilog display_lm.v; write_cxxrtl yosys-display_lm.cc"
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${CXX:-g++} -o yosys-display_lm_cc -I../.. display_lm_tb.cc
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${CC:-gcc} -o yosys-display_lm_cc -I../.. display_lm_tb.cc -lstdc++
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./yosys-display_lm_cc >yosys-display_lm_cc.log
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for log in yosys-display_lm.log yosys-display_lm_cc.log; do
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grep "^%l: \\\\bot\$" "$log"
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