proc_clean: only consider fully-defined case operands.

This commit is contained in:
Charlotte 2023-08-11 15:52:05 +10:00 committed by Marcelina Kościelnicka
parent 40978971f4
commit bf84861fc2
2 changed files with 23 additions and 1 deletions

View File

@ -41,7 +41,7 @@ void proc_clean_switch(RTLIL::SwitchRule *sw, RTLIL::CaseRule *parent, bool &did
break;
for (int j = 0; j < int(cs->compare.size()); j++) {
RTLIL::SigSpec &val = cs->compare[j];
if (!val.is_fully_const())
if (!val.is_fully_def())
continue;
if (val == sw->signal) {
cs->compare.clear();

View File

@ -0,0 +1,22 @@
read_rtlil <<EOT
module \m
wire width 1 \w
process $p
switch 3'001
case 3'--1
assign \w 3'001
case 3'-1-
assign \w 3'010
case 3'1--
assign \w 3'100
end
end
end
EOT
proc_clean # Bug: removes the cases.
proc_clean # Removes the now-empty switch and its containing process.
select -assert-count 1 */p:*