Clifford Wolf
|
61f37706f9
|
Merge pull request #884 from zachjs/master
fix local name resolution in prefix constructs
|
2019-03-19 14:08:57 +01:00 |
Zachary Snow
|
a5f4b83637
|
fix local name resolution in prefix constructs
|
2019-03-18 20:43:20 -04:00 |
Eddie Hung
|
ed32119d13
|
Fix shregmap to correctly recognise non chain users; cleanup
|
2019-03-18 16:12:19 -07:00 |
Eddie Hung
|
b94db54664
|
shiftx NULL pointer check
|
2019-03-18 13:35:54 -07:00 |
Clifford Wolf
|
90bce04156
|
Update issue template
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2019-03-17 12:53:47 +01:00 |
Clifford Wolf
|
6aae502a36
|
Update issue template
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2019-03-17 12:44:23 +01:00 |
Eddie Hung
|
d6d9ef0fee
|
Cleanup
|
2019-03-16 12:49:46 -07:00 |
Eddie Hung
|
fadeadb8c8
|
Only accept <128 for variable length, only if $shiftx exclusive
|
2019-03-16 08:51:13 -07:00 |
Clifford Wolf
|
5481205094
|
Merge pull request #877 from FelixVi/master
Add note about test requirements in README
|
2019-03-16 14:19:02 +01:00 |
Felix Vietmeyer
|
a71c38f163
|
Add note about test requirements in README
|
2019-03-16 06:20:59 -06:00 |
Eddie Hung
|
29a8d4745e
|
Cleanup synth_xilinx
|
2019-03-15 23:01:40 -07:00 |
Eddie Hung
|
06f8f2654a
|
Working
|
2019-03-15 19:13:40 -07:00 |
Clifford Wolf
|
aa65d3fe65
|
Improve mix of src/wire/wirebit coverage in "mutate -list"
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2019-03-16 00:55:46 +01:00 |
Clifford Wolf
|
3fb363ec8c
|
Merge pull request #876 from YosysHQ/clifford/fmcombine
Add fmcombine pass
|
2019-03-16 00:17:15 +01:00 |
Clifford Wolf
|
dacaebae35
|
Add "fmcombine -fwd -bwd -nop"
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2019-03-15 21:45:37 +01:00 |
Clifford Wolf
|
370db33a4c
|
Add fmcombine pass
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2019-03-15 20:46:17 +01:00 |
Clifford Wolf
|
b5cf8c9442
|
Merge pull request #875 from YosysHQ/clifford/mutate
Add "mutate" pass
|
2019-03-15 00:51:40 +01:00 |
Clifford Wolf
|
9820ed6531
|
Disable realmath tests
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2019-03-15 00:48:23 +01:00 |
Clifford Wolf
|
d1985f6a22
|
Improvements in "mutate" list-reduce algorithm
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2019-03-15 00:18:31 +01:00 |
Clifford Wolf
|
27a5d9c91e
|
Add "mutate -cfg", improve pick_cover behavior
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2019-03-14 23:20:41 +01:00 |
Clifford Wolf
|
4d304e3da7
|
Add a strictly coverage-driven mutation selection strategy
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2019-03-14 23:01:55 +01:00 |
Clifford Wolf
|
2a4263a75d
|
Improve "mutate" wire coverage metric
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2019-03-14 23:01:01 +01:00 |
Clifford Wolf
|
1b4fdbb0d8
|
Add more mutation types, improve mutation src cover
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2019-03-14 22:04:42 +01:00 |
Clifford Wolf
|
bacca57537
|
Fix smtbmc.py handling of zero appended steps
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2019-03-14 22:04:42 +01:00 |
Clifford Wolf
|
6ad5d036c5
|
Add "mutate" command DB reduce functionality
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2019-03-14 22:04:42 +01:00 |
Clifford Wolf
|
76c9c350e7
|
Add hashlib "<container>::element(int n)" methods
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2019-03-14 22:04:42 +01:00 |
Clifford Wolf
|
8e6b69d7bb
|
Add "mutate -mode inv", various other mutate improvements
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2019-03-14 22:04:42 +01:00 |
Clifford Wolf
|
ea8ee24140
|
Add basic "mutate -list N" framework
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2019-03-14 22:04:42 +01:00 |
Clifford Wolf
|
c4575103af
|
Merge pull request #874 from YosysHQ/clifford/andopt
Improve handling of and-with-1 and or-with-0 in opt_expr, fixes #327
|
2019-03-14 21:22:16 +01:00 |
Clifford Wolf
|
f806b95ed6
|
Improve handling of and-with-1 and or-with-0 in opt_expr, fixes #327
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2019-03-14 20:52:00 +01:00 |
Clifford Wolf
|
44a44a06ed
|
Merge pull request #872 from YosysHQ/clifford/pmuxfix
Improve handling of "full_case" attributes
|
2019-03-14 18:42:45 +01:00 |
Clifford Wolf
|
17caaa3fa8
|
Improve handling of "full_case" attributes
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2019-03-14 17:51:21 +01:00 |
Clifford Wolf
|
04e920337b
|
Fix a syntax bug in ilang backend related to process case statements
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2019-03-14 17:50:20 +01:00 |
Eddie Hung
|
e7ef7fa443
|
Reverse bits in INIT parameter for Xilinx, since MSB is shifted first
|
2019-03-14 09:38:42 -07:00 |
Eddie Hung
|
af5706c2a3
|
Misspell
|
2019-03-14 09:06:56 -07:00 |
Eddie Hung
|
8af9979aab
|
Revert "Add shregmap -init_msb_first and use in synth_xilinx"
This reverts commit 26ecbc1aee .
|
2019-03-14 09:01:48 -07:00 |
Eddie Hung
|
f1a8e8a480
|
Merge remote-tracking branch 'origin/master' into xc7srl
|
2019-03-14 08:59:19 -07:00 |
Clifford Wolf
|
53b28b3f01
|
Merge pull request #869 from cr1901/win-shell
Install launcher executable when running yosys-smtbmc on Windows.
|
2019-03-14 16:43:23 +01:00 |
Eddie Hung
|
26ecbc1aee
|
Add shregmap -init_msb_first and use in synth_xilinx
|
2019-03-14 08:10:02 -07:00 |
Eddie Hung
|
79b4a275ce
|
Fix cells_map for SRL
|
2019-03-14 08:09:48 -07:00 |
Eddie Hung
|
edca2f1163
|
Move shregmap until after first techmap
|
2019-03-13 17:13:52 -07:00 |
Eddie Hung
|
24f129ddfb
|
Refactor $__SHREG__ in cells_map.v
|
2019-03-13 16:17:54 -07:00 |
William D. Jones
|
ff15cf9b1f
|
Install launcher executable when running yosys-smtbmc on Windows.
Signed-off-by: William D. Jones <thor0505@comcast.net>
|
2019-03-13 13:49:16 -04:00 |
Clifford Wolf
|
f0b2d8e467
|
Merge pull request #868 from YosysHQ/clifford/fixmem
Various mem2reg-related improvements in handling of memories
|
2019-03-13 13:40:30 +01:00 |
Clifford Wolf
|
1cd04a6838
|
Fix a bug in handling quotes in multi-cmd lines in Yosys scripts
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2019-03-12 21:15:11 +01:00 |
Clifford Wolf
|
ac10f72e49
|
Merge pull request #866 from YosysHQ/clifford/idstuff
Improve determinism of IdString DB for similar scripts
|
2019-03-12 20:27:36 +01:00 |
Clifford Wolf
|
9284cf92b8
|
Remove ice40/cells_sim.v hack to avoid warning for blocking memory writes
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2019-03-12 20:14:18 +01:00 |
Clifford Wolf
|
d25a0c8ade
|
Improve handling of memories used in mem index expressions on LHS of an assignment
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2019-03-12 20:12:02 +01:00 |
Clifford Wolf
|
a4ddc569b4
|
Remove outdated "blocking assignment to memory" warning
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2019-03-12 20:10:55 +01:00 |
Clifford Wolf
|
ab5b50ae3c
|
Only set MEM2REG_FL_CONST_LHS/MEM2REG_FL_VAR_LHS for non-init writes, fixes #867
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2019-03-12 20:09:47 +01:00 |