66255dab4e
flatten: simplify.
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Flattening does not benefit from topologically sorting cells within
a module when processing them.
2020-06-04 00:02:12 +00:00
5d2b6d1394
flatten: simplify. NFC.
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Flatten is non-recursive and doesn't need to keep track of handled
cells.
2020-06-04 00:02:12 +00:00
3c3fa774e5
flatten: simplify. NFC.
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Flattening always does "non-recursive" mapping.
2020-06-04 00:02:12 +00:00
e561a3a76f
flatten: simplify. NFC.
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The `celltypeMap` always maps `x` to `{x}`.
2020-06-04 00:02:12 +00:00
6783876807
flatten: simplify. NFC.
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The `design` and `map` designs are always the same when flattening.
2020-06-04 00:02:12 +00:00
9338ff66b9
RTLIL: factor out RTLIL::Module::addMemory. NFC.
2020-06-04 00:02:12 +00:00
ebbbe2156e
flatten: rename techmap-related stuff. NFC.
2020-06-04 00:02:12 +00:00
76c4ee4ea5
techmap, flatten: remove dead options.
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After splitting the passes, some options can never be activated,
and most conditions involving them become dead. Remove them, and also
all of the newly dead code.
2020-06-04 00:02:12 +00:00
6ac54a74fe
flatten: split from techmap.
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Although the two passes started out very similar, they diverged over
time and now have little in common. Moreover, `techmap` is extremely
complex while `flatten` does not have to be, and this complexity
interferes with improving `flatten`.
2020-06-03 15:34:03 +00:00
fb5b070e7e
techmap: remove dead variable. NFC.
2020-06-03 01:44:06 +00:00
0a74368bfc
techmap: use C++11 default member initializers. NFC.
2020-06-02 23:43:20 +00:00
f3e86bb32a
techmap: simplify.
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`rewrite_filename` is already called in `Frontend::extra_args`.
2020-06-02 23:43:20 +00:00
68d747f767
techmap: use +/techmap.v instead of an ad-hoc code generator.
2020-06-02 23:43:20 +00:00
ff785cdb46
Merge pull request #1862 from boqwxp/cleanup_techmap
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Clean up `passes/techmap/techmap.cc`
2020-05-31 20:40:48 +02:00
fe273faad1
Merge pull request #2081 from YosysHQ/eddie/blackbox_ast
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blackbox: use Module::makeblackbox() method
2020-05-30 08:59:20 -07:00
ea46ed81f9
Merge pull request #2018 from boqwxp/qbfsat-timeout
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smtbmc and qbfsat: Add timeout option to set solver timeouts for Z3, Yices, and CVC4.
2020-05-30 15:04:51 +02:00
94c1035389
Merge pull request #1885 from Xiretza/mod-rem-cells
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Fix modulo/remainder semantics
2020-05-29 16:37:23 +02:00
5874a14d65
Merge pull request #2017 from boqwxp/qbfsat-cvc4
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qbfsat: Add support for CVC4.
2020-05-29 16:23:10 +02:00
1c8d5a08a0
Merge pull request #2016 from boqwxp/qbfsat-yices
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qbfsat: Add `-solver` option and allow choice of Z3 or Yices, making Yices the default.
2020-05-29 16:21:45 +02:00
edd8ff2c07
Add flooring division operator
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The $div and $mod cells use truncating division semantics (rounding
towards 0), as defined by e.g. Verilog. Another rounding mode, flooring
(rounding towards negative infinity), can be used in e.g. VHDL. The
new $divfloor cell provides this flooring division.
This commit also fixes the handling of $div in opt_expr, which was
previously optimized as if it was $divfloor.
2020-05-28 22:59:04 +02:00
17163cf43a
Add flooring modulo operator
...
The $div and $mod cells use truncating division semantics (rounding
towards 0), as defined by e.g. Verilog. Another rounding mode, flooring
(rounding towards negative infinity), can be used in e.g. VHDL. The
new $modfloor cell provides this flooring modulo (also known as "remainder"
in several languages, but this name is ambiguous).
This commit also fixes the handling of $mod in opt_expr, which was
previously optimized as if it was $modfloor.
2020-05-28 22:59:03 +02:00
0d99522b3c
Merge pull request #2095 from rswarbrick/hier-typo
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Fix small typos in documentation for hierarchy command
2020-05-28 10:49:14 +00:00
1158bbf7db
Fix small typos in documentation for hierarchy command
2020-05-28 11:39:44 +01:00
5896ffd56f
printattrs: Simplify `get_indent_str()`.
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Co-Authored-By: Xiretza <xiretza@xiretza.xyz>
2020-05-28 05:34:28 +00:00
f671c99cb8
printattrs: Refactor indentation string building for clarity.
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Co-Authored-By: whitequark <whitequark@whitequark.org>
2020-05-27 23:15:07 +00:00
e50e4ee285
printattrs: Use `flags` to pretty-print the `RTLIL::Const` appropriately.
...
Co-Authored-By: whitequark <whitequark@whitequark.org>
2020-05-27 08:00:00 +00:00
b8365547e9
misc: Add `printattrs` command.
2020-05-27 08:00:00 +00:00
9847a4eea8
smtbmc and qbfsat: Add timeout option to set solver timeouts for Z3, Yices, and CVC4.
2020-05-25 20:39:30 +00:00
f9eef5e3f7
qbfsat: Add support for CVC4.
2020-05-25 20:39:03 +00:00
903456c267
qbfsat: Add `-solver` option and allow choice of Z3 or Yices, making Yices the default.
...
Ensures that "BV" is the logic whenever solving an exists-forall problem with Yices, moves the "(set-logic ...)" directive above any non-info line, sets the `ef-max-iters` parameter to a very high number when using Yices in exists-forall mode so as not to prematurely abandon difficult problems, and does not provide the incompatible "--incremental" Yices argument when in exists-forall mode.
2020-05-25 20:38:29 +00:00
721283ac2a
blackbox: re-use existing Module::makeblackbox() method
2020-05-25 10:53:49 -07:00
ae11156c90
Merge pull request #2015 from boqwxp/qbfsat-bisection
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qbfsat: Add an iterative bisection optimization method and make it the default.
2020-05-25 15:50:18 +02:00
ac41f8a9c7
qbfsat: Remove cruft inadvertently left untouched in commit 86fc49a9d6.
2020-05-23 00:53:09 +00:00
aea0fd5ed4
qbfsat: Add bisection mode and make it the default.
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Also adds `-nooptimize` and reorganizes `qbfsat.cc` a bit.
2020-05-23 00:53:09 +00:00
4f0f321169
abc9_ops: update comment
2020-05-21 21:39:13 -07:00
637650597b
Merge pull request #2059 from boqwxp/logger-vector-to-dict
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log: Use `dict` instead of `std::vector<std::pair>` for `log_expect_{error, warning, log}` to better express the intent that each element is unique.
2020-05-21 15:36:30 +02:00
2d573a0ff6
Merge pull request #1926 from YosysHQ/eddie/abc9_auto_dff
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abc9: support seq synthesis when module has (* abc9_flop *) and bypass non-combinatorial (* abc9_box *)
2020-05-18 08:06:50 -07:00
8297afe925
log: Use `dict` instead of `std::vector<std::pair>` for `log_expect_{error, warning, log}` to better express the intent that each element is unique.
2020-05-15 00:55:32 +00:00
67fc0c3698
abc9: use (* abc9_keep *) instead of (* abc9_scc *); apply to $_DFF_?_
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instead of moving them to $__ prefix
2020-05-14 16:44:35 -07:00
07eecff9cc
Merge pull request #2055 from YosysHQ/eddie/logger_multiple
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logger: fix for multiple calls with same pattern
2020-05-14 15:30:08 -07:00
e173291649
techmap: Replace naughty `const_cast<>()`s.
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Co-Authored-By: Eddie Hung <eddie@fpgeh.com>
2020-05-14 20:06:55 +00:00
97fd304cbe
techmap: Replace pseudo-private member usage with the range accessor function and some naughty `const_cast<>()`s.
2020-05-14 20:06:55 +00:00
36bb201dd9
techmap: sort celltypeMap as it determines techmap order
2020-05-14 20:06:55 +00:00
ce62d0751a
Replace `std::set`s using custom comparators with `pool`.
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Co-Authored-By: Eddie Hung <eddie@fpgeh.com>
2020-05-14 20:06:55 +00:00
dabeb1e8a1
techmap: prefix special wires with backslash for use as IdString
2020-05-14 20:06:55 +00:00
bd54d67ad4
Further clean up `passes/techmap/techmap.cc`.
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Co-Authored-By: Eddie Hung <eddie@fpgeh.com>
2020-05-14 20:06:54 +00:00
982562ff13
Use `emplace()` for more efficient insertion into various `dict`s.
2020-05-14 20:06:54 +00:00
c658d9d59d
Build constant bits directly rather than constructing an object and copying its bits.
2020-05-14 20:06:54 +00:00
f235f212ea
Replace `std::set` with `pool` for `cell_to_inbit` and `outbit_to_cell`.
2020-05-14 20:06:54 +00:00
6294621825
Use `emplace()` rather than `insert()`.
2020-05-14 20:06:54 +00:00
whitequark
clairexen
Eddie Hung
Xiretza
Rupert Swarbrick
Alberto Gonzalez
Miodrag Milanović