riscv
/
yosys
mirror of https://github.com/YosysHQ/yosys.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity
8,660 Commits 81 Branches 48 Tags 63 MiB
Commit Graph

8660 Commits

Author SHA1 Message Date
Eddie Hung 9009b76a69 abc9_ops: add comments 2020-01-27 11:18:21 -08:00
Eddie Hung f443695a38 Merge remote-tracking branch 'origin/master' into eddie/verific_help 2020-01-27 10:34:10 -08:00
Eddie Hung d730bba6d2 verific: no help() when no YOSYS_ENABLE_VERIFIC 2020-01-27 10:32:18 -08:00
Eddie Hung 7b445121cc verific: also unflatten for 'hierarchy' flow as per @cliffordwolf 2020-01-27 10:15:22 -08:00
Eddie Hung af8281d2f5
Merge pull request #1656 from YosysHQ/eddie/ice40_abc9_warnings 
ice40: reduce ABC9 internal fanout warnings with a param for CI->I3
 2020-01-27 09:54:04 -08:00
Claire Wolf cef607c8b7 Add log_experimental() and experimental() API and "yosys -x" 
Signed-off-by: Claire Wolf <clifford@clifford.at>
 2020-01-27 18:27:47 +01:00
Claire Wolf 07a12ebd4f
Merge pull request #1658 from YosysHQ/clifford/smtbmcsolvernotfound 
Improve yosys-smtbmc "solver not found" handling
 2020-01-27 17:59:58 +01:00
Claire Wolf 485f31f681 Improve yosys-smtbmc "solver not found" handling 
Signed-off-by: Claire Wolf <clifford@clifford.at>
 2020-01-27 17:48:56 +01:00
Claire Wolf de6006fbc8
Merge pull request #1613 from porglezomp-misc/version-flag-alias 
Add --version and -version as aliases for -V
 2020-01-27 12:59:27 +01:00
Eddie Hung c7fbe13db5 read_aiger: set abc9_box_seq attr 2020-01-24 13:11:43 -08:00
Eddie Hung 81e6b040a4 ice40: add SB_SPRAM256KA arrival time 2020-01-24 12:17:09 -08:00
Eddie Hung b178761551 ice40: reduce ABC9 internal fanout warnings with a param for CI->I3 2020-01-24 11:59:48 -08:00
Eddie Hung cccc0ae112 verific: unflatten struct ports 2020-01-24 10:12:52 -08:00
Eddie Hung dbf351390e abc9: -reintegrate recover type from existing cell, check against boxid 2020-01-23 22:45:34 -08:00
Eddie Hung 2d795fb8c0 simple_abc9 tests to discard whitebox before write for sim 2020-01-23 22:07:43 -08:00
Eddie Hung dca1c806ec simple_abc9 tests to discard whitebox before write for sim 2020-01-23 19:55:11 -08:00
Eddie Hung e471b330ac abc_box_id -> abc9_box_id in test 2020-01-23 19:12:19 -08:00
Eddie Hung 245873d42d abc9: warning message if no modules selected 2020-01-23 19:08:51 -08:00
Eddie Hung 7858cf20a9 Fix $__ABC9_ASYNC1 to output 1'b1 not 1'b0 2020-01-23 19:02:27 -08:00
Eddie Hung 11e50c0e9e Test for (* keep *)-ed abc9_box_id 2020-01-23 18:56:25 -08:00
Eddie Hung f180dba753 abc9_ops: -prep_xaiger to skip (* keep *) cells 2020-01-23 18:56:06 -08:00
Eddie Hung 48aec34e0d abc_box_id -> abc9_box_id in test 2020-01-23 18:53:14 -08:00
Eddie Hung 1d4314d888 abc9_ops -prep_dff: insert async s/r mux in holes when replacing $_DFF_* 2020-01-23 14:58:56 -08:00
Eddie Hung af0e7637a2 alumacc: undo accidental commit 2020-01-22 20:54:03 -08:00
Eddie Hung da134701cd Fix $__ABC9_ASYNC1 to output 1'b1 not 1'b0 2020-01-22 14:22:03 -08:00
Eddie Hung 73526a6f10 read_aiger: also parse abc9_mergeability 2020-01-22 14:21:25 -08:00
Eddie Hung 8eb5bb258c Merge remote-tracking branch 'origin/eddie/abc9_fixes' into eddie/abc9_refactor 2020-01-22 12:30:14 -08:00
Eddie Hung da6abc0149
Merge pull request #1652 from YosysHQ/eddie/abc9_fixes 
Eddie/abc9 fixes
 2020-01-22 12:27:41 -08:00
Eddie Hung a94b41011d abc9: error out if flip-flop init is 1'b1 for '-dff' 
Due to ABC sequential synthesis restriction
 2020-01-22 10:08:48 -08:00
Eddie Hung 3b44b53e94 abc9: fix scratchpad entry abc9.verify 2020-01-22 09:36:54 -08:00
Eddie Hung 3d9737c1bd Merge remote-tracking branch 'origin/master' into eddie/abc9_refactor 2020-01-21 16:27:40 -08:00
Eddie Hung cd093c00f8 read_aiger: discard LUT inputs with nodeID == 0; not < 2 2020-01-21 11:56:30 -08:00
Eddie Hung 7f728bc116 read_aiger: ignore constant inputs on LUTs 2020-01-21 11:16:50 -08:00
Eddie Hung cd8f55a911 write_xaiger: fix for (* keep *) on flop output 2020-01-21 09:43:04 -08:00
Claire Wolf 5791c52e1b
Merge pull request #1637 from YosysHQ/mwk/fix-1634 
fsm_detect: Add a cache to avoid excessive CPU usage for big mux networks.
 2020-01-21 18:37:06 +01:00
Claire Wolf 30642e9570
Merge pull request #1629 from YosysHQ/mwk/edif-z 
edif: Just ignore connections to 'z
 2020-01-21 18:35:15 +01:00
Claire Wolf f165a74824
Merge pull request #1621 from YosysHQ/clifford/fminit 
Add fminit pass
 2020-01-20 22:01:57 +01:00
David Shah 22c967e35e ast: Add support for $sformatf system function 
Signed-off-by: David Shah <dave@ds0.me>
 2020-01-19 21:20:17 +00:00
Eddie Hung b7be6cfd65
Merge pull request #1643 from YosysHQ/eddie/cleanup_arith_map 
Cleanup +/xilinx/arith_map.v
 2020-01-18 09:11:52 -08:00
David Shah a4cfd1237f
Merge pull request #1602 from niklasnisbeth/ice40-init-vals-warning 
ice40: Demote conflicting FF init values to a warning
 2020-01-18 09:47:17 +00:00
Eddie Hung 67c6bf0b6b
Merge pull request #1645 from YosysHQ/eddie/fix1644 
{ice40,xilinx}_dsp: improve robustess
 2020-01-17 19:25:59 -08:00
Eddie Hung 6a163b5ddd xilinx_dsp: another typo; move xilinx specific test 2020-01-17 17:07:03 -08:00
Eddie Hung db68e4c2a7 ice40_dsp: fix typo 2020-01-17 16:08:04 -08:00
Eddie Hung e17f3f8c63 Consistency 2020-01-17 16:06:20 -08:00
Eddie Hung ee500b6d8e xilinx_dsp: add parameter defaults 2020-01-17 16:05:10 -08:00
Eddie Hung 5507c328ff Add #1644 testcase 2020-01-17 15:57:52 -08:00
Eddie Hung 78ffd5d193 synth_ice40: call wreduce before mul2dsp 2020-01-17 15:41:55 -08:00
Eddie Hung ad6c49fff1 ice40_dsp: add test 2020-01-17 15:38:26 -08:00
Eddie Hung 4985318263 ice40_dsp: add default values for parameters 2020-01-17 15:37:52 -08:00
Eddie Hung 6692e5d558 ice40_dsp: tolerant of fanout-less outputs, as well as all-zero inputs 2020-01-17 15:28:02 -08:00