mirror of https://github.com/YosysHQ/yosys.git
Consistency
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@ -56,10 +56,12 @@ code sigA sigB sigH
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break;
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sigH.append(O[i]);
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}
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log_assert(nusers(O.extract_end(i)) <= 1);
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if (sigH.empty())
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// This sigM could have no users if downstream sinks (e.g. $add) is
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// narrower than $mul result, for example
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if (i == 0)
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reject;
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log_assert(nusers(O.extract_end(i)) <= 1);
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endcode
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code argQ ffA ffAholdmux ffArstmux ffAholdpol ffArstpol sigA clock clock_pol
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@ -460,7 +460,7 @@ arg argD argQ clock
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code
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dff = nullptr;
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if (GetSize(argQ) == 0)
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if (argQ.empty() == 0)
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reject;
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for (const auto &c : argQ.chunks()) {
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// Abandon matches when 'Q' is a constant
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