Eddie Hung
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4555b5b819
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kernel: more pass by const ref, more speedups
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2020-03-18 11:21:53 -07:00 |
Eddie Hung
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8b12e97153
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kernel: speedup
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2020-03-18 08:48:36 -07:00 |
Eddie Hung
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8c45ea9f0e
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kernel: use const reference for SigSet too
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2020-03-17 10:22:33 -07:00 |
Eddie Hung
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bc51e609cb
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kernel: fix DeleteWireWorker
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2020-03-17 10:22:16 -07:00 |
Eddie Hung
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432a09af80
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kernel: SigSpec use more const& + overloads to prevent implicit SigSpec
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2020-03-13 08:17:39 -07:00 |
Eddie Hung
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b567f03c26
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kernel: optimise Module::remove(const pool<RTLIL::Wire*>()
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2020-03-12 16:00:34 -07:00 |
Eddie Hung
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a076052fe4
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kernel: SigPool to use const& + overloads to prevent implicit SigSpec
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2020-03-12 16:00:34 -07:00 |
Miodrag Milanovic
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a0cc795e85
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Added filter-out for libyosys.so
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2020-03-12 18:28:20 +01:00 |
Miodrag Milanovic
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f37f558f72
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Revert "Clean up 'install' Makefile target"
This reverts commit 2a746234fe .
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2020-03-12 18:26:19 +01:00 |
Miodrag Milanovic
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178a8e3bff
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Revert "Improve ABC repository management in Makefile"
This reverts commit 90404e1969 .
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2020-03-12 18:26:07 +01:00 |
Miodrag Milanović
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af84e5acf1
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Merge pull request #1666 from Xiretza/improve-makefile
Makefile improvements for packaging scripts
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2020-03-12 16:14:48 +02:00 |
N. Engelhardt
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6986371bac
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Merge pull request #1751 from boqwxp/add_assert
Extend `add` command to allow adding $assert cells.
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2020-03-12 11:18:35 +01:00 |
Miodrag Milanovic
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82ad422b4e
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Add mandatory wasm file to zip file as well
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2020-03-12 11:17:15 +01:00 |
Miodrag Milanović
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d38098e5fa
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Merge pull request #1757 from jiegec/fix-emcc
Fix compilation for emcc
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2020-03-12 12:16:28 +02:00 |
jiegec
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26137d8bb7
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Add EXTRA_EXPORTED_RUNTIME_METHODS env for yosysjs
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2020-03-11 23:01:04 +08:00 |
jiegec
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7b679eecb3
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Fix compilation for emcc
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2020-03-11 22:09:24 +08:00 |
Eddie Hung
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dd8ebf7873
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Merge pull request #1743 from YosysHQ/eddie/abc9_keep
abc9: improve (* keep *) handling
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2020-03-11 06:32:15 -07:00 |
Eddie Hung
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d624a11dd1
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Merge pull request #1744 from YosysHQ/eddie/fix1675
Bump ABCREV to receive fix for #1675
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2020-03-11 06:31:06 -07:00 |
Alberto Gonzalez
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005dd601ab
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Extend `add` command to allow adding cells for verification like $assert, $assume, etc.
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2020-03-10 21:49:22 +00:00 |
David Shah
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f2550d45ff
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Merge pull request #1753 from YosysHQ/dave/abc9-speedup
Add ScriptPass::run_nocheck and use for abc9
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2020-03-10 13:51:59 +00:00 |
David Shah
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ddcd87b577
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Merge pull request #1721 from YosysHQ/dave/tribuf-unused
deminout: Don't demote inouts with unused bits
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2020-03-10 13:51:40 +00:00 |
N. Engelhardt
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f91705cf8a
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Merge pull request #1755 from boqwxp/add_cmd_cleanup
Clean up `passes/cmds/add.cc` code style.
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2020-03-10 13:10:50 +01:00 |
Alberto Gonzalez
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47537f2e42
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Clean up passes/cmds/add.cc code style.
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2020-03-10 10:37:10 +00:00 |
Eddie Hung
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d23acf8c61
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Merge pull request #1747 from YosysHQ/claire/partselfix
Fix partsel expr bit width handling and add test case
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2020-03-09 11:51:57 -07:00 |
David Shah
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b8abf14376
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Add ScriptPass::run_nocheck and use for abc9
Signed-off-by: David Shah <dave@ds0.me>
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2020-03-09 14:34:22 +00:00 |
N. Engelhardt
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282d331e7e
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Merge pull request #1716 from zeldin/ecp5_fix
ecp5: remove unused parameter from \$__ECP5_PDPW16KD
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2020-03-09 11:04:08 +01:00 |
Claire Wolf
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a7cc4673c3
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Fix partsel expr bit width handling and add test case
Signed-off-by: Claire Wolf <claire@symbioticeda.com>
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2020-03-08 16:12:12 +01:00 |
Eddie Hung
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3be7784d0e
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xaiger: remove some unnecessary operations ...
... since they can not be triggered by (* keep *) anymore
(but could still be triggered by (* abc9_scc *) !?!)
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2020-03-06 10:51:47 -08:00 |
Eddie Hung
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7a89ed1fa2
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Bump ABCREV to receive fix for #1675
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2020-03-06 10:32:48 -08:00 |
Eddie Hung
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80dcc8a0d1
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abc9: for sccs, create a new wire instead of using entirety of existing
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2020-03-06 10:30:07 -08:00 |
Eddie Hung
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91a7a74ac4
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abc9: (* keep *) wires to be PO only, not PI as well; fix scc handling
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2020-03-06 10:20:30 -08:00 |
Eddie Hung
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2335c59e5b
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abc: add abc.debug scratchpad option
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2020-03-06 10:09:01 -08:00 |
N. Engelhardt
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8a39a580e1
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remove unused parameters
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2020-03-06 16:45:36 +01:00 |
Miodrag Milanović
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bfeba9ad11
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Merge pull request #1742 from nakengelhardt/rpc-test-again
More rpc test fixes
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2020-03-06 16:06:54 +01:00 |
N. Engelhardt
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88494e81f5
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rpc test: make frontend listen before launching yosys & introduce safeguard if yosys errors
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2020-03-06 15:29:01 +01:00 |
Eddie Hung
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8b074cc473
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Merge pull request #1739 from YosysHQ/eddie/issue1738
ice40: fix specify for -device {lp,u}
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2020-03-05 09:41:54 -08:00 |
Eddie Hung
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69f1555058
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ice40: fix specify for ICE40_{LP,U}
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2020-03-05 08:11:49 -08:00 |
Eddie Hung
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3c2e910bb3
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tests: extend tests/arch/run-tests.sh for defines
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2020-03-05 08:08:32 -08:00 |
Eddie Hung
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0930c00f03
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ice40: fix implicit signal in specify, also clamp negative times to 0
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2020-03-04 15:28:17 -08:00 |
Eddie Hung
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6eb528277e
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Merge pull request #1735 from YosysHQ/eddie/abc9_dsp48e1
xilinx: cleanup DSP48E1 handling for abc9
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2020-03-04 13:37:09 -08:00 |
Eddie Hung
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7b543fdb0c
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xilinx: consider DSP48E1.ADREG
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2020-03-04 12:04:02 -08:00 |
Eddie Hung
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512596760b
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xilinx: cleanup DSP48E1 handling for abc9
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2020-03-04 11:31:12 -08:00 |
Eddie Hung
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f65fc845e5
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xilinx: improve specify for DSP48E1
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2020-03-04 11:31:12 -08:00 |
Eddie Hung
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78d4fff69d
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xilinx: missing DSP48E1.PCIN timing from abc9_{map,model}.v
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2020-03-04 11:31:12 -08:00 |
David Shah
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5cae9c6e16
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deminout: Don't demote inouts with unused bits
Signed-off-by: David Shah <dave@ds0.me>
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2020-03-04 18:44:38 +00:00 |
N. Engelhardt
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0ec971444b
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Merge pull request #1691 from ZirconiumX/use-flowmap-in-noabc
Add -flowmap option to `synth{,_ice40}`
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2020-03-03 19:15:41 +01:00 |
Claire Wolf
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d59da5a4e4
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Fix bison warning for "pure-parser" option
Signed-off-by: Claire Wolf <claire@symbioticeda.com>
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2020-03-03 08:41:55 -08:00 |
Claire Wolf
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b597f85b13
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Merge pull request #1718 from boqwxp/precise_locations
Closes #1717. Add more precise Verilog source location information to AST and RTLIL nodes.
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2020-03-03 08:38:32 -08:00 |
Claire Wolf
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91892465e1
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Merge pull request #1681 from YosysHQ/eddie/fix1663
verilog: instead of modifying localparam size, extend init constant expr
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2020-03-03 08:34:31 -08:00 |
Claire Wolf
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879124333f
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Merge pull request #1519 from YosysHQ/eddie/submod_po
submod: several bugfixes
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2020-03-03 08:19:06 -08:00 |