Eddie Hung
|
a9efd2e81c
|
Restore part of doc
|
2019-10-03 10:51:53 -07:00 |
Eddie Hung
|
bd5889640b
|
Disable equiv check for ice40 latches
|
2019-10-03 10:45:53 -07:00 |
Eddie Hung
|
7a6dec1cef
|
Add new -async2sync option
|
2019-10-03 10:30:51 -07:00 |
Eddie Hung
|
5d680590d6
|
Use equiv_opt -async2sync for xilinx
|
2019-10-03 10:30:33 -07:00 |
Eddie Hung
|
8765ec3c27
|
Revert "equiv_opt to call async2sync when not -multiclock like SymbiYosys"
This reverts commit a39505e329 .
|
2019-10-03 10:07:15 -07:00 |
Eddie Hung
|
c6d15c9aad
|
Revert "Update doc for equiv_opt"
This reverts commit a274b7cc86 .
|
2019-10-03 10:07:03 -07:00 |
Clifford Wolf
|
2ed2e9c3e8
|
Change smtbmc "Warmup failed" status to "PREUNSAT"
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2019-10-03 14:59:07 +02:00 |
Clifford Wolf
|
17cb916cc8
|
Update ABC to git rev 623b5e8
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2019-10-03 14:05:21 +02:00 |
Clifford Wolf
|
be8efd7c7b
|
Bump version
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2019-10-03 12:26:08 +02:00 |
Clifford Wolf
|
468b8a5178
|
Merge pull request #1419 from YosysHQ/eddie/lazy_derive
module->derive() to be lazy and not touch ast if already derived
|
2019-10-03 12:06:12 +02:00 |
Clifford Wolf
|
0e05424885
|
Merge pull request #1422 from YosysHQ/eddie/aigmap_select
Add -select option to aigmap
|
2019-10-03 11:54:04 +02:00 |
Clifford Wolf
|
afdc990595
|
Merge pull request #1429 from YosysHQ/clifford/checkmapped
Add "check -mapped"
|
2019-10-03 11:50:53 +02:00 |
Clifford Wolf
|
3e27b2846b
|
Add "check -allow-tbuf"
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2019-10-03 11:49:56 +02:00 |
David Shah
|
e46e8753c8
|
frontends/ast: code style
Signed-off-by: David Shah <dave@ds0.me>
|
2019-10-03 09:55:43 +01:00 |
David Shah
|
9b9d24f15b
|
sv: Improve tests
Signed-off-by: David Shah <dave@ds0.me>
|
2019-10-03 09:54:45 +01:00 |
David Shah
|
5501d9090a
|
sv: Fix typedefs in blocks
Signed-off-by: David Shah <dave@ds0.me>
|
2019-10-03 09:54:45 +01:00 |
David Shah
|
8cc1bee33c
|
sv: Disambiguate interface ports
Signed-off-by: David Shah <dave@ds0.me>
|
2019-10-03 09:54:45 +01:00 |
David Shah
|
1746b6373b
|
Update CHANGELOG and README
Signed-off-by: David Shah <dave@ds0.me>
|
2019-10-03 09:54:45 +01:00 |
David Shah
|
abc155715d
|
sv: Add test scripts for typedefs
Signed-off-by: David Shah <dave@ds0.me>
|
2019-10-03 09:54:14 +01:00 |
David Shah
|
c0bb47beca
|
sv: Fix memories of typedefs
Signed-off-by: David Shah <dave@ds0.me>
|
2019-10-03 09:54:14 +01:00 |
David Shah
|
497faf4ec0
|
sv: Add %expect
Signed-off-by: David Shah <dave@ds0.me>
|
2019-10-03 09:54:14 +01:00 |
David Shah
|
af25585170
|
sv: Add support for memories of a typedef
Signed-off-by: David Shah <dave@ds0.me>
|
2019-10-03 09:54:14 +01:00 |
David Shah
|
30d2326030
|
sv: Add support for memory typedefs
Signed-off-by: David Shah <dave@ds0.me>
|
2019-10-03 09:54:14 +01:00 |
David Shah
|
e70e4afb60
|
sv: Fix typedefs in packages
Signed-off-by: David Shah <dave@ds0.me>
|
2019-10-03 09:54:14 +01:00 |
David Shah
|
c962951612
|
sv: Fix typedef parameters
Signed-off-by: David Shah <dave@ds0.me>
|
2019-10-03 09:54:14 +01:00 |
David Shah
|
f6b5e47e40
|
sv: Switch parser to glr, prep for typedef
Signed-off-by: David Shah <dave@ds0.me>
|
2019-10-03 09:54:14 +01:00 |
David Shah
|
e0a6742935
|
Merge pull request #1425 from YosysHQ/dave/ecp5_pdp16
ecp5: Add support for mapping 36-bit wide PDP BRAMs
|
2019-10-03 09:53:45 +01:00 |
Eddie Hung
|
e9645c7fa7
|
Fix broken CI, check reset even for constants, trim rstmux
|
2019-10-02 21:26:26 -07:00 |
Eddie Hung
|
278533fe59
|
Merge pull request #1423 from YosysHQ/eddie/techmap_replace_wire
RFC: techmap to recognise wires named "_TECHMAP_REPLACE_.<suffix>"
|
2019-10-02 19:40:39 -07:00 |
Eddie Hung
|
e4bd5aaebf
|
Fix test
|
2019-10-02 18:12:25 -07:00 |
Eddie Hung
|
c6a55d948a
|
Merge branch 'eddie/fix_sat_init' into eddie/fix1427
|
2019-10-02 18:07:38 -07:00 |
Eddie Hung
|
f6fabc8fda
|
Update test
|
2019-10-02 18:03:45 -07:00 |
Eddie Hung
|
d99810ad8a
|
Refactor peepopt_dffmux and be sensitive to \init when trimming
|
2019-10-02 18:01:45 -07:00 |
Eddie Hung
|
e730a595ee
|
Add test
|
2019-10-02 18:01:41 -07:00 |
Eddie Hung
|
62c66406ad
|
log_dump() to support State enum
|
2019-10-02 17:49:07 -07:00 |
Eddie Hung
|
f46ac1df9f
|
Be mindful that sigmap(wire) could have dupes when checking \init
|
2019-10-02 16:08:46 -07:00 |
Eddie Hung
|
c28d4b8047
|
Add test that is expecting to fail
|
2019-10-02 14:52:40 -07:00 |
Eddie Hung
|
265a655ef9
|
Also rename cells with _TECHMAP_REPLACE_. prefix, as per @cliffordwolf
|
2019-10-02 12:43:35 -07:00 |
Eddie Hung
|
a4f2f7d23c
|
Extend test with renaming cells with prefix too
|
2019-10-02 12:43:18 -07:00 |
Clifford Wolf
|
6028f5df1a
|
Merge pull request #1428 from YosysHQ/clifford/fixbtor
Fix btor back-end to use "state" instead of "input" for undef init bits
|
2019-10-02 13:48:09 +02:00 |
Clifford Wolf
|
45e4c040d7
|
Add "check -mapped"
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2019-10-02 13:35:03 +02:00 |
Clifford Wolf
|
a84a2d74c7
|
Fix btor back-end to use "state" instead of "input" for undef init bits
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2019-10-02 12:48:04 +02:00 |
Miodrag Milanović
|
da347b9f7e
|
Merge pull request #1426 from YosysHQ/mmicko/fix_environ
Define environ, fixes #1424
|
2019-10-01 19:50:37 +02:00 |
Miodrag Milanovic
|
c026579c20
|
Define environ, fixes #1424
|
2019-10-01 18:45:07 +02:00 |
David Shah
|
b424d374db
|
ecp5: Fix shuffle_enable port
Signed-off-by: David Shah <dave@ds0.me>
|
2019-10-01 14:14:46 +01:00 |
David Shah
|
7a1538cd36
|
ecp5: Add support for mapping 36-bit wide PDP BRAMs
Signed-off-by: David Shah <dave@ds0.me>
|
2019-10-01 13:46:36 +01:00 |
Sergey
|
eb750670e3
|
run-test.sh Move $x at end of line.
|
2019-10-01 11:14:12 +03:00 |
Sergey
|
e092c4ae6b
|
Merge branch 'master' into SergeyDegtyar/efinix
|
2019-10-01 11:04:32 +03:00 |
Sergey
|
d99b1e3261
|
Merge branch 'master' into SergeyDegtyar/anlogic
|
2019-10-01 10:57:09 +03:00 |
Sergey
|
fc56459746
|
run-test.sh Move $x at end of line.
|
2019-10-01 10:55:34 +03:00 |