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sv: Fix memories of typedefs 

Signed-off-by: David Shah <dave@ds0.me>
This commit is contained in:
David Shah 2019-09-20 12:11:17 +01:00
parent 497faf4ec0
commit c0bb47beca
1 changed files with 1 additions and 1 deletions
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2
frontends/verilog/verilog_parser.y
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@ -1350,7 +1350,7 @@ wire_name:
if ($2 != NULL) {
if (node->is_input || node->is_output)
frontend_verilog_yyerror("input/output/inout ports cannot have unpacked dimensions.");
if (!astbuf2) {
if (!astbuf2 && !node->is_custom_type) {
AstNode *rng = new AstNode(AST_RANGE);
rng->children.push_back(AstNode::mkconst_int(0, true));
rng->children.push_back(AstNode::mkconst_int(0, true));